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利用同步辐射微断层调查的多尺度三维微电子封装

DOI :

10.3791/53683-v

April 13th, 2016

April 13th, 2016

9,851 Views

1Materials Engineering Division, Lawrence Livermore National Laboratory, 2Assembly Test and Technology Development Failure Analysis Labs, Intel Corporation, 3Advanced Light Source, Lawrence Berkeley National Laboratory

在这项研究中同步加速器辐射微断层摄影术中,非破坏性的三维成像技术中,用于研究整个微电子封装为16×16毫米的截面积。由于同步的高通量和亮度样品成像,在短短3分钟,8.7微米的空间分辨率。

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