我们感谢KY谭P.见和GC Tettamanzi进行了有益的讨论。我们承认，从澳大利亚研究理事会（批准号:DP120104710），芬兰科学院（批准号:251748，135794，272806）的资金支持，并支持澳大利亚国家制造工厂的设备制造。 AR确认来自新南威尔士大学的早期职业研究员补助金计划的资金支持。设施和技术支持由阿尔托大学在纳米加工Micronova中心规定也承认。

注:本协议描述用于制造，封装和测试基于硅的MOS QD技术的单电子泵的过程。在子部分1和2所讨论的步骤进行了在ISO5的洁净室，而第3在ISO6实验室中进行。环境条件被连续地控制。对于温度和湿度的标称值被设定在20±1℃和​​55％±5％之间。 1.微细<ol><li>场氧化物<ol><li>清洗晶片浸入下列:食人鱼蚀刻（10分钟），去离子（DI）水（10分钟），RCA-2溶液（DI水175毫升，盐酸30毫升，H 2 O 2的 30毫升在100℃下为10分钟），去离子水（5分钟），氢氟酸（HF）酸在水中稀释10:1（10秒），DI水（10分钟）。处理频率（ 即 ，护目镜，PVC围裙，和PVC手套）时，使用防护服。继续在规定的顺序。 </li><li>将晶圆在900℃的氧化炉和氧化步骤如下:干燥的O 2（10分钟），湿的O 2（40分钟），干O 2（10分钟），N 2（15分钟）。 </li></ol></li><li>欧姆接触<ol><li>进行光刻和蚀刻氧化物。 <ol><li>沉积的粘合促进六甲基二硅氮烷（HMDS）几纳米厚层到晶片表面上，如下所示:预烘在热板上在110℃下1分钟，倒在玻璃烧杯中〜50毫升的HMDS，将烧杯并在真空室中的晶片，撤离和等待2分钟。 </li><li>旋转晶片的两个前后侧上的2-4微米厚的光刻胶层（3000-5000转，在25-40秒取决于所需厚度）。 </li><li>暴露在掩模对准紫外光（10毫瓦/厘米2，根据抗蚀剂厚度4-10秒）。在热板上在110℃下1分钟后烘焙。 </li><li>发展1-2分钟，然后用清水冲洗用去离子水。 </LI&gt; <li>执行O 2等离子蚀刻20分钟（压力= 340乇;入射功率= 50瓦;反射功率&lt;1W）。 </li><li>在缓冲的HF酸溶液蚀刻氧化物（15:1，4-5分钟，刻蚀速率≈20纳米/分钟，在30℃）。冲洗在去离子水（5分钟）。吹干用N 2。 </li></ol></li><li>通过浸渍在丙酮中除去光致抗蚀剂。涮在异丙醇（IPA），然后吹干用N 2。 </li><li> （根据所期望的掺杂浓度的N 2流量为30-45分钟）放置晶片在炉中，在1000℃下用磷源。 </li><li>用HF酸稀释在水（10:1，3-4分钟，蚀刻速率≈40纳米/分在30℃下）除去污染的氧化物层，冲洗去离子水（10分钟）。 </li><li>作为氧化1.1.2。 </li></ol></li><li>栅氧化层<ol><li>重复步骤1.2.1和1.2.2。 </li><li>放置晶片在专用炉中，在800℃和氧化步骤如下:干燥的O 2（10分钟）中，dichloroethylene + O 2（20分钟），干O 2（10-30分钟取决于所需的氧化层厚度），N 2（15分钟）。 </li></ol></li><li>欧姆接触金属化<ol><li>重复步骤1.2.1。 </li><li>放置晶片于电子束蒸发。蒸发的铝100nm的0.2-0.5纳米/秒和5×10 -6乇。 </li><li>浸泡在N-甲基-2-吡咯烷酮（NMP）上加热板的晶片在80℃下1小时，以抬离金属。必要时可使用超声搅拌。冲洗在IPA 2分钟。吹干用N 2。 </li><li>退火中形成气体，在400℃下进行至少15分钟。 </li></ol></li></ol> 2.纳米加工<ol><li>晶片切割<ol><li>自旋任何抗蚀剂到晶片充当保护涂层（的聚合物和纺丝参数类型无关在此阶段）。 </li><li>使用金刚石针尖切丁酶到晶片切成〜10×2mm的2单个芯片。 </li></ol></li><li>清洁的<ol><li>泡在NMP 1小时烤盘上，在80℃，然后用清水冲洗在IPA 2分钟。吹干用N 2。 </li><li>执行O 2等离子蚀刻5分钟（入射功率= 50瓦;反射功率&lt;1W）。 </li><li>旋清洁用丙酮和IPA（7500转，30秒） </li></ol></li><li>对准标记图案<ol><li>自旋聚甲基丙烯酸甲酯（PMMA 950K）的A4抗蚀剂（5,000-7,500转，30秒取决于所需厚度）。典型工作厚度≈150-200纳米。烘烤的抗蚀剂在热板上在180℃下90秒。 </li><li>开展电子束光刻。使用以下条件写:束能量= 30千电子伏，束流≈30 PA，面积剂量≈500-650μC/厘米2取决于标记的大小和厚度抵制。 </li><li>开发中的抗蚀剂的甲基异丁基酮和IPA中的溶液（1:3）为40〜60秒，然后用清水冲洗在IPA持续20秒。吹干用N 2枪。 </li><li>地方该芯片在电子束蒸发器。蒸发的Ti为15nm，并在0.2-0.4纳米/秒的65毫微米的Pt和5×10 -6乇。 </li><li>取下金属如步骤1.4.3。 </li><li>清洁芯片作为在步骤2.2.2-2.2.3。 </li></ol></li><li>门图案<ol><li>旋抵制在2.3.1。 </li><li>开展电子束光刻。使用以下条件写入高分辨率的特点:束能量= 30千电子伏，束流≈30 PA，面积剂量≈500-700μC/厘米2。写条件低分辨率特点:束能量= 15千电子伏，束流10≈呐，面积剂量≈400-600μC/厘米2。 </li><li>制定抵制在2.3.3。 </li><li>发生在热蒸发器芯片。蒸发的Al在0.1-0.4纳米/秒和1-9×10 -6毫巴。目标厚度相应于层号不同而不同， 如图2B（25-35毫微米为层1，45-65纳米为第2层，75-90Ñ米为3层）。 </li><li>取下金属如步骤1.4.3。 </li><li>在热板上进行铝氧化，在150℃下进行5-10分钟。 </li><li>清洁片作为步骤2.2.3。 </li><li>重复步骤2.4.1-2.4.7两次以实现3层的栅极堆叠。 </li></ol></li></ol> 3.包装设备<ol><li>骰子芯片如在步骤2.1 </li><li>冲洗在丙酮和IPA所得小的芯片2分钟。 </li><li>粘上一个单件，以在印刷电路板（PCB）与聚甲基丙烯酸甲酯的A5。等待2分钟，它干。另外，为提高热化，使用银环氧树脂。 </li><li>加载到PCB的楔形键合机并继续布线。 </li></ol> 4.设备完整性测试<ol><li>安装包含有线设备到浸探头的PCB。 </li><li>接线板的电气线路的那些浸渍探针。 </li><li>将探头插入含有液态氦的容器。缓慢进行，以避免过多的氦气b油客。 </li><li>对于每个设备门，所述探针的相应的室温电极连接到源测量单元，同时保持接地的其它栅极。设置符合当前要少娜。扫从零电压到1.5V，步长为0.1伏，测量并记录电流。 </li><li>各栅极线连接到电池供电的可变直流电压源，源极线到内置的交流电压源一个锁相放大器，且漏极线到锁定放大器的输入端口。 </li><li>测量到漏极电导为不同栅电压配置（ 见图4）的来源。 <ol><li>在全球范围内坡道通过保持C1和C2门应用于门BL，BR，PL，SL和DL，电压接地。记录"接通"器件的特性。 </li><li>单独减速每个栅极电压和记录门"夹断"的特点。 </li><li>调节栅极电压来静电定义曲antum点通过设置BL和BR（PL，SL和DL）小（较大）的电压比导通电压。记录库仑阻塞特性。 </li></ol></li></ol>

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作者什么都没有透露。

本文报道的协议描述的技术来制造硅的MOS量子点，以及实验步骤，以测试它们的功能完整性和操作它们作为单电子泵。值得注意的是，通过调整栅设计，在同一个制造工序，可以采用，以产生设备适合于量子位的读出和控制17，以及电荷抽12,13。我们注意到，许多在本文中所引述的工艺参数可以根据所使用的制造工具而变化（校准，使或模型），以及在硅基板（厚度和背景掺杂浓度）的类型。量如光刻曝光剂量或开发时间，蚀刻或氧化的持续时间，必须仔细校准和测试，以确保可靠的产率。此外，关键的是要避免因使用不同的过程相同的制造工具所产生的交叉污染。为此，一些铬的itical步骤进行的设备专用于硅处理，如金属蒸发器，氧气转炉和HF浴。 更一般地，硅被绘制一个越来越大的兴趣作为首选材料来实现电荷泵18-20。这部分是由于使用的是工业兼容的硅工艺实现了新的基于量子的电流标准的吸引力角度。这将受益于成熟的，可靠的集成技术的可扩展性，并行和驾驶开销。重要的是，一个完整的互补MOS（CMOS）技术，无传统的金属作为栅极材料，已经显示出大大降低背景电荷波动单电子器件21。这种波动可以实现计量精度有害的。 这里所讨论的协议被限制为实现MOS纳米器件与金属栅极。因此，为了achie已经充分工业兼容性和减少电荷的波动，这将需要修改的栅极沉积技术，并使用高度掺杂的多晶硅作为栅极材料。 总之，这里所讨论的MOS QD泵最近结合硅的技术优势，在精确的电流产生13方面是非常好的性能。这源于设计和制造方法，该方法允许一个堆叠多个栅层导致紧凑和灵活的系统的高的灵活性。与减少的背景电荷波动的潜在点起来的静电禁闭得到的细调谐设置了舞台，以克服在其他半导体中观察到的主要挑战泵22,23。

Silicon is the material of choice for most of the modern microelectronics. Its properties, combined with advanced lithographic techniques, have allowed the semiconductor industry to achieve very large-scale integration and deliver billions of transistors per chip. The metal-oxide-semiconductor (MOS) technology1 has been the key of this relentless technological progress2. In brief, it is based on a selectively doped Si substrate which is thermally oxidized to grow a high quality SiO2 gate oxide on which a metal gate electrode is deposited. Recently, it has been shown that the use of a stack of gate oxides could be beneficial3 . While present industry standards have reached minimum feature sizes for gate lengths below 20 nm, it is becoming increasingly evident that, at this level of miniaturization, detrimental quantum mechanical phenomena come into play that may complicate further downscaling4.
Remarkably, silicon is also an excellent host material to exploit the quantum properties of the electron charge and spin5. This has broadened its range of applicability to entirely new fields such as quantum computing6 and quantum electrical metrology7. Among other approaches5, the use of a multi-gate MOS technology8,9 has led to electrostatically-defined quantum dots (QD) whose occupancy can be controlled down to single-electron level10. Unlike the conventional MOS process where just one gate per transistor is needed1, these QDs are defined via a three-layer stack of Al/AlyOx gates which are used to selectively accumulate electrons at the Si/SiO2 interface, as well as provide lateral and vertical confinement11.
Although these devices had been originally developed for quantum computing applications, they have also recently shown promising performances as metrological tools12,13. In the field of quantum electrical metrology, a long-standing goal is the redefinition of the unit ampere in terms of the elementary charge (e) 14. In particular, the emphasis is on the realization of nano-scale charge pumps to clock the transfer of individual electrons timely and accurately. These devices generate macroscopic quantized electric currents, I=nef, where f is the frequency of an external driving oscillator and n is an integer. To date, the best performance has been achieved with a GaAs-based pump by yielding a current in excess of 150 pA with a relative uncertainty of 1.2 parts per million15. Recently, silicon MOS QDs have also stood out for the implementation of highly accurate single-electron pumps thanks to the capability of finely tuning the charge confinement13.
Here, we discuss the protocol used for the fabrication of silicon MOS QDs. Furthermore, the cryogenic set-up used to test the integrity of the devices after fabrication and the one to perform charge pumping experiments are described. Finally, representative measurements of quantized electric current are reported.

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	<tbody>
		<tr>
			<td>Silicon wafers</td>
			<td>TOPSIL</td>
			<td></td>
			<td>4 inch</td>
		</tr>
		<tr>
			<td>Electron-beam lithography machine</td>
			<td>Raith gmbh</td>
			<td></td>
			<td>Raith 150two</td>
		</tr>
		<tr>
			<td>E-beam resist&#160;</td>
			<td>MicroChem gmbh</td>
			<td></td>
			<td>PMMA</td>
		</tr>
		<tr>
			<td>Photoresist</td>
			<td>MicroChem gmbh</td>
			<td></td>
			<td>nLOF2020</td>
		</tr>
		<tr>
			<td>Mask aligner</td>
			<td>Quintel</td>
			<td></td>
			<td>Q6000</td>
		</tr>
		<tr>
			<td>Photoresist developer</td>
			<td>MicroChem gmbh</td>
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			<td>AZ826MIF</td>
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silicon metal-oxide-semiconductor quantum dots for single-electron pumping

As mass-produced silicon transistors have reached the nano-scale, their behavior and performances are increasingly affected, and often deteriorated, by quantum mechanical effects such as tunneling through single dopants, scattering via interface defects, and discrete trap charge states. However, progress in silicon technology has shown that these phenomena can be harnessed and exploited for a new class of quantum-based electronics. Among others, multi-layer-gated silicon metal-oxide-semiconductor (MOS) technology can be used to control single charge or spin confined in electrostatically-defined quantum dots (QD). These QD-based devices are an excellent platform for quantum computing applications and, recently, it has been demonstrated that they can also be used as single-electron pumps, which are accurate sources of quantized current for metrological purposes. Here, we discuss in detail the fabrication protocol for silicon MOS QDs which is relevant to both quantum computing and quantum metrology applications. Moreover, we describe characterization methods to test the integrity of the devices after fabrication. Finally, we give a brief description of the measurement set-up used for charge pumping experiments and show representative results of electric current quantization.

设备制造初始微制造工艺（议定书子部分1）是商业4英寸高纯度硅晶片上进行（n型掺杂浓度≈10 12 cm -3的;电阻率&gt; 10kΩcm;厚度= 310-340微米）。这样做的目的是实现在其上的栅电极将被沉积在基板上。该基板是由封端的场氧化（步骤1.1），封端的场氧化（步骤1.2），覆盖有高质量的栅极氧化物（步骤1.3）的本征区域的n +区域的本征区域的，和金属化的n +区域欧姆接触（步骤1.4）。 图1A-D示出了微细加工的主要步骤。 图1E示出了一个基片场的显微镜图像的微细加工之后。最小特征尺寸的光刻在此阶段是约4微米。 串口在步骤1.1生长2氧化物层具有100nm的标称厚度，并且被用作钝化层。充当欧姆导体的n型区经由磷扩散获得。目标掺杂浓度是大约10月19日至 10月20日 cm -3以下 。高质量的SiO 2，其选择生长用作栅极电介质具有5纳米的标称厚度。目标接口缺陷密度是&lt;10 10电子伏特-1 cm -2的在中间能隙。专用和内置特意墙三重炉用于此过程。这个系统被设计成最小化从重金属离子和移动的碱金属离子污染，以及防止水分扩散进入氧化室。为了形成电接触，铝焊盘通过电子束蒸发在n型区的部分沉积。 该纳米制造工艺（见分节2）芯片上执行SUBSTR通过切割在第1步的目的处理的晶片获得的茨是实现用于静电限定该MOS量子点纳米尺度栅电极。每个纳米加工运行通常会产生10-15完整的设备样品。扫描电子显微照片（SEM），每批次成像的1-2设备通常进行，以确认该EBL光刻阶段获得了成功。自扫描电镜成像可注入电荷在衬底或在金属栅极而造成泄漏，仅一小数量的设备进行检查以这种方式，而其余的电测试。最小特征尺寸的光刻在此阶段是约35纳米。以实现沉积Al膜的均匀性好，该金属被蒸发速率为几个埃/秒的速度慢，而在基片被安装在一个旋转台。这被保持在RT，并且在Al晶粒尺寸估计为约20nm。 图2A示出了nanofabricatio的主要步骤Ñ ​​过程。 图2B示出与该栅电极的正确定义被验证的SEM图像。一般来说，人们的目的是实现这些门直接定义QD（BL，BR和PL）用尽可能小的特征尺寸。与此相反，用于定义电子储层（DL和SL）这些门可以有更大的尺寸，以避免能量水平中的引线的无意离散。实现了在步骤2.3纳米尺度的Ti / Pt的标记被用作栅极的三个层的一致对准参考。铂是选择了其相对于优秀的对比度，以在SiO 2表面的电子束。钛是用于提高粘合性。 在制造过程的各个阶段，碳纤维尖镊子用于处理芯片，以减少破坏性静电放电（ESD）的可能性。 最后，为了进行上INDIVI电测量双重装置，每个芯片需要在更小的碎片为约2×2mm的2（子部分3）被切割。然后每一块胶合到一个特制的PCB（罗杰斯R03010低损耗介质），其销通过铝导线被连接到器件电极。引线键合是用一个楔形键合机机不加热的芯片。合适的键合参数的选择是基于两方面的考虑。一方面，所述引线接合需要穿孔的热的Al Y 2 O x层和使良好的金属对金属与栅极焊盘接触。另一方面，过大的机械应力可能导致的冲头槽式事件，这损害了场氧化物的栅极和原因衬底泄漏下方。在布线过程中，使用防静电手环的建议，以防止静电放电。在图3中 ，有6个单独的设备将芯片粘接到印刷电路板。 器件的完整性测试之前Ë加载装置插入mK的温度测量平台如稀释制冷机，初步电测试在4.2K下进行检查样品的完整性（参见议定书子部分4）。为此，在PCB插入到无氧铜外壳和安装到一浸探针，其最终被浸入液态He。 初始测试通常为在各个闸门顺序执行泄漏测试。源测量单元被连接到一个单独的栅电极，而其他人都接地。电压上升到1.5 V和电流的测量在源头。在该电压范围内，在正常的门是不应该进行，因为SiO 2层从硅衬底隔离的金属和Alÿ○×绝缘重叠栅极。典型地，氧化物击穿已知会出现对电压高于〜为4V较大，这取决于设备的几何形状和氧化物THIC到天堂。因此，如果在测试过程中检测到的电流，则很可能在氧化层中的至少一个已损坏，该设备具有被丢弃。通常，门的小于10％的显示泄漏​​。产率是已知的受栅电极的平面延伸。特别是，与栅氧化物区域就越有可能将具有栅极 - 基片的泄漏的栅极的较大的重叠。类似地，来自不同层的栅极的栅极到栅极泄漏的更可能发生之间的较大的重叠会。引用的产量相关占据约50μm2的面积上的薄氧化物栅和与层间的大约0.5微米2重叠。 一旦设备已通过初始泄漏测试时，源极和漏极触点连接到一个锁定放大器和栅极到模块化可控电压电池架。在此配置中，该装置被接通öN以全球同步斜坡所有的栅极电压。接着，将各栅极电压分别逐渐减小，同时保持其他在高电压，以验证个人门的夹断电流的能力。 图4A示出了这些测量的代表痕迹。由于没有任何一个源 - 漏传导通路或个别栅极夹断是经常一些类型的门损坏诸如栅极爆炸或金属不连续的指示。 最后，源-漏电流被测量为源-漏偏压和柱塞栅极电压的函数来观察库仑阻塞16（参照图4B）的签名。 测量一旦合适的设备已被发现，它是从液态He容器中取出，并用一个热风枪干燥，以避免形成湿气可能引起静电。最后，它被转移到一个稀释制冷机。 &lt;P类="j​​ove_content"&gt;该实验是在自制塑料稀释制冷机进行约100 m·K的基础温度。低温恒温器是在真空室中浸渍在4.2K下氦浴。电线被热能化在1K池也被用来冷凝传入的3He蒸气。在混合室，从所述的3He富相入氦3-稀相的3He原子的吸热转移允许系统以达到约100 m·K的基础温度。 如图5所示 ，冰箱装有20直流线路和用于连接的室温电子给设备在低温下3射频线。五个直流线路是Thermocoax电缆和15双绞线织机导线。这些线连接样本到电池供电的直流电压源的栅电极。分压器在RT用于减少对个别栅极电噪声。射频线是半刚性同轴电缆是<html>在4K衰减10 dB至减少热噪声和直流阻塞在室温。这些线连接到PCB上的偏置T形件的共面波导。 低噪声跨导放大器和一个数字万用表用于测量由泵产生的电流。电子经由电池供电的光隔离器连接到设备，以防止接地回路的形成。射频驱动信号由任意波形发生器，其接地从低温恒温器通过一个直流嵌段成分之一分离出产生的（ 见图5）。 在PCB包含16纯直流线路和用于直流和交流电压结合在低温4偏置T形线路。 如图3B所示 ，RC分立元件用于实现三通连接（R = 100千欧，C = 10 nF的），50Ω匹配集成共面波导用于高频信号的传输。 e_content"&gt;一旦该装置是在mK的温度，栅极电压被调整，使得在QD单电子占用为止。特别是，隧道壁垒下门的BL和BR形成，并且下栅极的电子积聚层被诱导PL，SL和DL。为此，阻挡栅极电压被设置为低于其导通的值，而积累栅极被极化在一个大于-导通电压，在这种方式的QD是下栅极PL所形成和它的平面延伸通过门电路C1和C2的电压被保持在低于其导通的值以诱导静电约束控制。接着，对射频信号导通，以周期性地调节所述隧道势垒（多个）的透明度，以及电化学点的电位。单电子泵送实现与一个或两个正弦驱动电压。在一个信号驱动的情况下，驱动信号被施加到栅极的BL以调制隧道势垒的电势在左手中机端量子点。在两信号驱动的情况下，交流激励被施加到栅极的BL和PL调节两者的左屏障和QD的电位在相同的频率但具有不同相位和幅度。这些附加自由度允许一个用于控制电子转移13的方向。一个迭代过程通常需要调整的主要实验参数（ 即 ，射频驱动信号振幅/相位和直流栅极电压），并达到最佳当前量化。注意的是，无论这两个泵送协议需要一个漏源偏压来执行电荷转移。因此，在源电极和漏电极在泵操作期间接地。 图6示出了特性的电流plateaux在EF的通过施加两信号正弦驱动到输入屏障（BL）和柱塞（PL）栅极获得的整数倍。这些数据取自在相对低的驱动频率（10兆赫）的量，吨<html>参数uning可以快速进行。在实践中，理想的是操作泵在数百MHz，通常需要更精细的参数优化13。 <img alt="图1" src="/files/ftp_upload/52852/52852fig1.jpg" /> 图1.微细加工。（一 ）示意图的微细加工主要步骤图。漫画并非按比例绘制。 （B）中实现的掺杂区的欧姆接触。 （C）栅氧化层的实现。 （D）的金属化的欧姆接触。 （ 五）微观个体领域的微细加工后，在一个芯片上的图像就完成了。现场尺寸为1.2×1.2 平方毫米。 <a href="https://www.jove.com/files/ftp_upload/52852/52852fig1large.jpg" target="_blank">请点击此处查看该图的放大版本。</a> 帐篷"FO:保持together.within页="总是"&gt; <img alt="图2" src="/files/ftp_upload/52852/52852fig2.jpg" /> 图2纳米加工。（A）的制造方法，各个栅层。漫画并非按比例绘制。 （B）中用于电荷泵浦实验的3层栅极纳米结构。左:类似于用于测量所述一个设备的SEM图像。右:在整个X切割和Y切割设备的示意性的横截面图<a href="https://www.jove.com/files/ftp_upload/52852/52852fig2large.jpg" target="_blank">请点击此处查看该图的放大版本。</a> <img alt="图3" src="/files/ftp_upload/52852/52852fig3.jpg" /> 图3.电气连接到样品。在印刷电路板（A）布局。 （B）中的印刷电路板与一个偏置T形（左）的区域的放大的ð等效电路（右）。 （C）上形成芯片粘在芯片保持器和连结线，供与PCB电连接6的各个字段。 （D）纳米加工后，单个字段的显微图像。在栅氧化层区域的中心门布局（E）的SEM图像。 <a href="https://www.jove.com/files/ftp_upload/52852/52852fig3large.jpg" target="_blank">请点击此处查看该图的放大版本。</a> <img alt="图4" src="/files/ftp_upload/52852/52852fig4.jpg" /> 图4.初步试验。（A）的源-漏交流电流（均方根），为不同的栅极电压的函数。迹线在113.17赫兹测量与锁定放大器50μV 有效值激励。对于个别栅极电压迹线的其余的栅极电压被固定为2.0伏，除了当V C1 = &lt;的EM&gt; V C2 =源-漏电流的0.0 V.（B）的彩色图作为柱塞栅极电压和源极-漏极偏置电压:V SL的函数= 1.5，V DL = 1.15，V BL = 0.78伏， V BR = 0.85，V C1 = V C2 = 0.0 V. <a href="https://www.jove.com/files/ftp_upload/52852/52852fig4large.jpg" target="_blank">请点击此处查看该图的放大版本。</a> <img alt="图5" src="/files/ftp_upload/52852/52852fig5.jpg" /> 图5.示意图测量的设置。二直流线（绿色）和三个同轴射频线（黑）连接的RT电子到PCB。泵（紫色）的漏极被连接到跨导放大器和通过光隔离器的数字万用表，而源极接触（红色）接地。单独的接地连接（我ndicated用不同的符号）被用于电子仪器和低温恒温器的电线。 <a href="https://www.jove.com/files/ftp_upload/52852/52852fig5large.jpg" target="_blank">请点击此处查看该图的放大版本。</a> <img alt="图6" src="/files/ftp_upload/52852/52852fig6.jpg" /> 图6.当前量化。在应用到门BL和PL F = 10 MHz的泵浦电流为第 V PL功能的双信号正弦波驱动。相位差= 49度，V RF PL = V RF BL = 0.31 V峰峰值。抽plateaux在EF的整数倍的理想位置显示为红色水平线。 <a href="https://www.jove.com/files/ftp_upload/52852/52852fig6large.jpg" target="_blank">请点击此处查看该图的放大版本。</a>

Watch this Scientific Journal Video about Silicon Metal-oxide-semiconductor Quantum Dots for Single-electron Pumping at JoVE.com

Silicon Metal-oxide-semiconductor Quantum Dots for Single-electron Pumping

The fabrication process and experimental characterization techniques relevant to single-electron pumps based on silicon metal-oxide-semiconductor quantum dots are discussed.

硅金属 - 氧化物 - 半导体量子点单电子泵

As mass-produced silicon transistors have reached the nano-scale, their behavior and performances are increasingly affected, and often deteriorated, by ...

silicon-metal-oxide-semiconductor-quantum-dots-for-single-electron

Universidad San Sebastian

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Electrical Engineering

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Unit 1

Basics of Semiconductors

SCIENTISTS IN ACTION

14.3K 次观看.  University of New South Wales. The fabrication process and experimental characterization techniques relevant to single-electron pumps based on silicon metal-oxide-semiconductor quantum dots are discussed.

视频: Silicon Metal-oxide-semiconductor Quantum Dots for Single-electron Pumping

Compact Quantum Dots for Single-molecule Imaging

Single-molecule imaging is an important tool for understanding the mechanisms of biomolecular function and for visualizing the spatial and temporal heterogeneity of molecular behaviors that underlie cellular biology 1-4. To image an individual molecule of interest, it is typically conjugated to a fluorescent tag (dye, protein, bead, or quantum dot) and observed with epifluorescence or total internal reflection fluorescence (TIRF) microscopy. While dyes and fluorescent proteins have been the mainstay of fluorescence imaging for decades, their fluorescence is unstable under high photon fluxes necessary to observe individual molecules, yielding only a few seconds of observation before complete loss of signal. Latex beads and dye-labeled beads provide improved signal stability but at the expense of drastically larger hydrodynamic size, which can deleteriously alter the diffusion and behavior of the molecule under study.
Quantum dots (QDs) offer a balance between these two problematic regimes. These nanoparticles are composed of semiconductor materials and can be engineered with a hydrodynamically compact size with exceptional resistance to photodegradation 5. Thus in recent years QDs have been instrumental in enabling long-term observation of complex macromolecular behavior on the single molecule level. However these particles have still been found to exhibit impaired diffusion in crowded molecular environments such as the cellular cytoplasm and the neuronal synaptic cleft, where their sizes are still too large 4,6,7.
Recently we have engineered the cores and surface coatings of QDs for minimized hydrodynamic size, while balancing offsets to colloidal stability, photostability, brightness, and nonspecific binding that have hindered the utility of compact QDs in the past 8,9. The goal of this article is to demonstrate the synthesis, modification, and characterization of these optimized nanocrystals, composed of an alloyed HgxCd1-xSe core coated with an insulating CdyZn1-yS shell, further coated with a multidentate polymer ligand modified with short polyethylene glycol (PEG) chains (Figure 1). Compared with conventional CdSe nanocrystals, HgxCd1-xSe alloys offer greater quantum yields of fluorescence, fluorescence at red and near-infrared wavelengths for enhanced signal-to-noise in cells, and excitation at non-cytotoxic visible wavelengths. Multidentate polymer coatings bind to the nanocrystal surface in a closed and flat conformation to minimize hydrodynamic size, and PEG neutralizes the surface charge to minimize nonspecific binding to cells and biomolecules. The end result is a brightly fluorescent nanocrystal with emission between 550-800 nm and a total hydrodynamic size near 12 nm. This is in the same size range as many soluble globular proteins in cells, and substantially smaller than conventional PEGylated QDs (25-35 nm).

We describe the preparation of colloidal quantum dots with minimized hydrodynamic size for single-molecule fluorescence imaging. Compared to conventional quantum dots, these nanoparticles are similar in size to globular proteins and are optimized for single-molecule brightness, stability against photodegradation, and resistance to nonspecific binding to proteins and cells.

紧凑型量子点的单分子成像

Single-molecule imaging is an important tool for  understanding the mechanisms of biomolecular function and for visualizing the  spatial and temporal ...

科研

工程学

Gradient Echo Quantum Memory in Warm Atomic Vapor

Gradient echo memory (GEM) is a protocol for storing optical quantum states of light in atomic ensembles. The primary motivation for such a technology is that quantum key distribution (QKD), which uses Heisenberg uncertainty to guarantee security of cryptographic keys, is limited in transmission distance. The development of a quantum repeater is a possible path to extend QKD range, but a repeater will need a quantum memory. In our experiments we use a gas of rubidium 87 vapor that is contained in a warm gas cell. This makes the scheme particularly simple. It is also a highly versatile scheme that enables in-memory refinement of the stored state, such as frequency shifting and bandwidth manipulation. The basis of the GEM protocol is to absorb the light into an ensemble of atoms that has been prepared in a magnetic field gradient. The reversal of this gradient leads to rephasing of the atomic polarization and thus recall of the stored optical state. We will outline how we prepare the atoms and this gradient and also describe some of the pitfalls that need to be avoided, in particular four-wave mixing, which can give rise to optical gain.

The gradient echo memory is a protocol for storing optical quantum states of light in atomic ensembles. Quantum memory is a key element of a quantum repeater, which can extend the range of quantum key distribution. We outline the operation of the scheme when implemented in a 3-level atomic ensemble.

梯度回波量子存储在温暖的原子蒸气

Gradient  echo memory (GEM) is a protocol for storing optical quantum states of light in  atomic ensembles. The primary motivation for such a technology ...

Nanofabrication of Gate-defined GaAs/AlGaAs Lateral Quantum Dots

A quantum computer is a computer composed of quantum bits (qubits) that takes advantage of quantum effects, such as superposition of states and entanglement, to solve certain problems exponentially faster than with the best known algorithms on a classical computer. Gate-defined lateral quantum dots on GaAs/AlGaAs are one of many avenues explored for the implementation of a qubit. When properly fabricated, such a device is able to trap a small number of electrons in a certain region of space. The spin states of these electrons can then be used to implement the logical 0 and 1 of the quantum bit. Given the nanometer scale of these quantum dots, cleanroom facilities offering specialized equipment- such as scanning electron microscopes and e-beam evaporators- are required for their fabrication. Great care must be taken throughout the fabrication process to maintain cleanliness of the sample surface and to avoid damaging the fragile gates of the structure. This paper presents the detailed fabrication protocol of gate-defined lateral quantum dots from the wafer to a working device. Characterization methods and representative results are also briefly discussed. Although this paper concentrates on double quantum dots, the fabrication process remains the same for single or triple dots or even arrays of quantum dots. Moreover, the protocol can be adapted to fabricate lateral quantum dots on other substrates, such as Si/SiGe.

This paper presents a detailed fabrication protocol for gate-defined semiconductor lateral quantum dots on gallium arsenide heterostructures. These nanoscale devices are used to trap few electrons for use as quantum bits in quantum information processing or for other mesoscopic experiments such as coherent conductance measurements.

纳米加工门定义的GaAs / AlGaAs多量子点横向

A quantum computer is a computer composed of quantum bits (qubits) that takes advantage of quantum effects, such as superposition of states and ...

Scanning-probe Single-electron Capacitance Spectroscopy

The integration of low-temperature scanning-probe techniques and single-electron capacitance spectroscopy represents a powerful tool to study the electronic quantum structure of small systems - including individual atomic dopants in semiconductors. Here we present a capacitance-based method, known as Subsurface Charge Accumulation (SCA) imaging, which is capable of resolving single-electron charging while achieving sufficient spatial resolution to image individual atomic dopants. The use of a capacitance technique enables observation of subsurface features, such as dopants buried many nanometers beneath the surface of a semiconductor material1,2,3. In principle, this technique can be applied to any system to resolve electron motion below an insulating surface.
As in other electric-field-sensitive scanned-probe techniques4, the lateral spatial resolution of the measurement depends in part on the radius of curvature of the probe tip. Using tips with a small radius of curvature can enable spatial resolution of a few tens of nanometers. This fine spatial resolution allows investigations of small numbers (down to one) of subsurface dopants1,2. The charge resolution depends greatly on the sensitivity of the charge detection circuitry; using high electron mobility transistors (HEMT) in such circuits at cryogenic temperatures enables a sensitivity of approximately 0.01 electrons/Hz&frac12; at 0.3 K 5.

Scanning-probe single-electron capacitance spectroscopy facilitates the study of single-electron motion in localized subsurface regions. A sensitive charge-detection circuit is incorporated into a cryogenic scanning probe microscope to investigate small systems of dopant atoms beneath the surface of semiconductor samples.

扫描探针单电子电容谱

The integration of low-temperature scanning-probe techniques and single-electron capacitance spectroscopy represents a powerful tool to study the ...

Analysis of Contact Interfaces for Single GaN Nanowire Devices

Single GaN nanowire (NW) devices fabricated on SiO2 can exhibit a strong degradation after annealing due to the occurrence of void formation at the contact/SiO2 interface. This void formation can cause cracking and delamination of the metal film, which can increase the resistance or lead to a complete failure of the NW device. In order to address issues associated with void formation, a technique was developed that removes Ni/Au contact metal films from the substrates to allow for the examination and characterization of the contact/substrate and contact/NW interfaces of single GaN NW devices. This procedure determines the degree of adhesion of the contact films to the substrate and NWs and allows for the characterization of the morphology and composition of the contact interface with the substrate and nanowires. This technique is also useful for assessing the amount of residual contamination that remains from the NW suspension and from photolithographic processes on the NW-SiO2 surface prior to metal deposition. The detailed steps of this procedure are presented for the removal of annealed Ni/Au contacts to Mg-doped GaN NWs on a SiO2 substrate.

A technique was developed that removes Ni/Au contact metal films from their substrate to allow for the examination and characterization of the contact/substrate and contact/NW interfaces of single GaN nanowire devices.

单氮化镓纳米线设备分析接触界面

Single GaN nanowire (NW) devices fabricated on SiO2 can exhibit  a strong degradation after annealing due to the  occurrence of void formation at the ...

Monolayer Contact Doping of Silicon Surfaces and Nanowires Using Organophosphorus Compounds

Monolayer Contact Doping (MLCD) is a simple method for doping of surfaces and nanostructures1. MLCD results in the formation of highly controlled, ultra shallow and sharp doping profiles at the nanometer scale. In MLCD process the dopant source is a monolayer containing dopant atoms.
In this article a detailed procedure for surface doping of silicon substrate as well as silicon nanowires is demonstrated. Phosphorus dopant source was formed using tetraethyl methylenediphosphonate monolayer on a silicon substrate. This monolayer containing substrate was brought to contact with a pristine intrinsic silicon target substrate and annealed while in contact. Sheet resistance of the target substrate was measured using 4 point probe. Intrinsic silicon nanowires were synthesized by chemical vapor deposition (CVD) process using a vapor-liquid-solid (VLS) mechanism; gold nanoparticles were used as catalyst for nanowire growth. The nanowires were suspended in ethanol by mild sonication. This suspension was used to dropcast the nanowires on silicon substrate with a silicon nitride dielectric top layer. These nanowires were doped with phosphorus in similar manner as used for the intrinsic silicon wafer. Standard photolithography process was used to fabricate metal electrodes for the formation of nanowire based field effect transistor (NW-FET). The electrical properties of a representative nanowire device were measured by a semiconductor device analyzer and a probe station.

A detailed procedure for surface doping of Silicon interfaces is provided. The ultra-shallow surface doping is demonstrated by using phosphorus containing monolayers and rapid annealing process. The method can be used for doping of macroscopic area surfaces as well as nanostructures.

Monolayer Contact Doping (MLCD) is a simple method for doping of surfaces and nanostructures1. MLCD results in the formation of highly controlled, ultra ...

Fabrication of Uniform Nanoscale Cavities via Silicon Direct Wafer Bonding

Measurements of the heat capacity and superfluid fraction of confined 4He have been performed near the lambda transition using lithographically patterned and bonded silicon wafers. Unlike confinements in porous materials often used for these types of experiments3, bonded wafers provide predesigned uniform spaces for confinement. The geometry of each cell is well known, which removes a large source of ambiguity in the interpretation of data.
Exceptionally flat, 5 cm diameter, 375 &#181;m thick Si wafers with about 1 &#181;m variation over the entire wafer can be obtained commercially (from Semiconductor Processing Company, for example). Thermal oxide is grown on the wafers to define the confinement dimension in the z-direction. A pattern is then etched in the oxide using lithographic techniques so as to create a desired enclosure upon bonding. A hole is drilled in one of the wafers (the top) to allow for the introduction of the liquid to be measured. The wafers are cleaned2 in RCA solutions and then put in a microclean chamber where they are rinsed with deionized water4. The wafers are bonded at RT and then annealed at ~1,100 &#176;C. This forms a strong and permanent bond. This process can be used to make uniform enclosures for measuring thermal and hydrodynamic properties of confined liquids from the nanometer to the micrometer scale.

A method for permanently bonding two silicon wafers so as to realize a uniform enclosure is described. This includes wafer preparation, cleaning, RT bonding, and annealing processes. The resulting bonded wafers (cells) have uniformity of enclosure ~1%1,2. The resulting geometry allows for measurements of confined liquids and gasses.

通过硅直接晶圆粘接制造均匀纳米级腔

Measurements of the heat capacity and superfluid fraction of confined 4He have been performed near the lambda transition using lithographically patterned ...

Construction and Characterization of External Cavity Diode Lasers for Atomic Physics

Since their development in the late 1980s, cheap, reliable external cavity diode lasers (ECDLs) have replaced complex and expensive traditional dye and Titanium Sapphire lasers as the workhorse laser of atomic physics labs1,2. Their versatility and prolific use throughout atomic physics in applications such as absorption spectroscopy and laser cooling1,2 makes it imperative for incoming students to gain a firm practical understanding of these lasers. This publication builds upon the seminal work by Wieman3, updating components, and providing a video tutorial. The setup, frequency locking and performance characterization of an ECDL will be described. Discussion of component selection and proper mounting of both diodes and gratings, the factors affecting mode selection within the cavity, proper alignment for optimal external feedback, optics setup for coarse and fine frequency sensitive measurements, a brief overview of laser locking techniques, and laser linewidth measurements are included.

This is an instructional paper to guide the construction and diagnostics of external cavity diode lasers (ECDLs), including component selection and optical alignment, as well as the basics of frequency reference spectroscopy and laser linewidth measurements for applications in the field of atomic physics.

外腔半导体激光器的原子物理的构建与鉴定

Since their development in the late 1980s, cheap, reliable external cavity diode lasers (ECDLs) have replaced complex and expensive traditional dye and ...

Selective Area Modification of Silicon Surface Wettability by Pulsed UV Laser Irradiation in Liquid Environment

The wettability of silicon (Si) is one of the important parameters in the technology of surface functionalization of this material and fabrication of biosensing devices. We report on a protocol of using KrF and ArF lasers irradiating Si (001) samples immersed in a liquid environment with low number of pulses and operating at moderately low pulse fluences to induce Si wettability modification. Wafers immersed for up to 4 hr in a 0.01% H2O2/H2O solution did not show measurable change in their initial contact angle (CA) ~75&#176;. However, the 500-pulse KrF and ArF lasers irradiation of such wafers in a microchamber filled with 0.01% H2O2/H2O solution at 250 and 65 mJ/cm2, respectively, has decreased the CA to near 15&#176;, indicating the formation of a superhydrophilic surface. The formation of OH-terminated Si (001), with no measurable change of the wafer&#8217;s surface morphology, has been confirmed by X-ray photoelectron spectroscopy and atomic force microscopy measurements. The selective area irradiated samples were then immersed in a biotin-conjugated fluorescein-stained nanospheres solution for 2 hr, resulting in a successful immobilization of the nanospheres in the non-irradiated area. This illustrates the potential of&#160;the method for selective area biofunctionalization and fabrication of advanced Si-based biosensing architectures. We also describe a similar protocol of irradiation of wafers immersed in methanol (CH3OH) using ArF laser operating at pulse fluence of 65 mJ/cm2 and in situ formation of a strongly hydrophobic surface of Si (001) with the CA of 103&#176;. The XPS results indicate ArF laser induced formation of Si&#8211;(OCH3)x compounds responsible for the observed hydrophobicity. However, no such compounds were found by XPS on the Si surface irradiated by KrF laser in methanol, demonstrating the inability of the KrF laser to photodissociate methanol and create -OCH3 radicals.

We report on a process of in situ alteration of HF treated Si (001) surface into a hydrophilic or hydrophobic state by irradiating samples in microfluidic chambers filled with&#160;H2O2/H2O solution (0.01%-0.5%) or methanol solutions using pulsed UV laser of a relative low pulse fluence.

硅表面润湿性的选择区域改性脉冲紫外激光照射在液体环境

The wettability of silicon (Si) is one of the important parameters in the technology of surface functionalization of this material and fabrication of ...

Light Enhanced Hydrofluoric Acid Passivation: A Sensitive Technique for Detecting Bulk Silicon Defects

A procedure to measure the bulk lifetime (&#62;100 &#181;sec) of silicon wafers by temporarily attaining a very high level of surface passivation when immersing the wafers in hydrofluoric acid (HF) is presented. By this procedure three critical steps are required to attain the bulk lifetime. Firstly, prior to immersing silicon wafers into HF, they are chemically cleaned and subsequently etched in 25% tetramethylammonium hydroxide. Secondly, the chemically treated wafers are then placed into a large plastic container filled with a mixture of HF and hydrochloric acid, and then centered over an inductive coil for photoconductance (PC) measurements. Thirdly, to inhibit surface recombination and measure the bulk lifetime, the wafers are illuminated at 0.2 suns for 1 min&#160;using a halogen lamp, the illumination is switched off, and a PC measurement is immediately taken. By this procedure, the characteristics of bulk silicon defects can be accurately determined. Furthermore, it is anticipated that a sensitive RT surface passivation technique will be imperative for examining bulk silicon defects when their concentration is low (&#60;1012 cm-3).

A RT liquid surface passivation technique to investigate the recombination activity of bulk silicon defects is described. For the technique to be successful, three critical steps are required: (i) chemical cleaning and etching of silicon, (ii) immersion of silicon in 15% hydrofluoric acid and (iii) illumination for 1 min.

光增强氢氟酸钝化:一个敏感的技术检测散装硅缺陷

A procedure to measure the bulk lifetime (&#62;100 &#181;sec) of silicon wafers by temporarily attaining a very high level of surface passivation when ...