Fabrication of Gate-tunable Graphene Devices for Scanning Tunneling Microscopy Studies with Coulomb Impurities

DOI :

10.3791/52711-v

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July 24th, 2015

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15,114 Views

Han Sae Jung^1,2, Hsin-Zon Tsai¹, Dillon Wong¹, Chad Germany¹, Salman Kahn¹, Youngkyou Kim^1,3, Andrew S. Aikawa¹, Dhruv K. Desai¹, Griffin F. Rodgers¹, Aaron J. Bradley¹, Jairo Velasco Jr.¹, Kenji Watanabe⁴, Takashi Taniguchi⁴, Feng Wang^1,5,6, Alex Zettl^1,5,6, Michael F. Crommie^1,5,6

¹Department of Physics, University of California at Berkeley, ²Department of Chemistry, University of California at Berkeley, ³Department of Chemical and Biomolecular Engineering, University of California at Berkeley, ⁴National Institute for Materials Science (Japan), ⁵Materials Sciences Division, Lawrence Berkeley National Laboratory, ⁶Kavli Energy NanoSciences Institute, University of California at Berkeley and Lawrence Berkeley National Laboratory

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This paper details the fabrication process of a gate-tunable graphene device, decorated with Coulomb impurities for scanning tunneling microscopy studies. Mapping the spatially dependent electronic structure of graphene in the presence of charged impurities unveils the unique behavior of its relativistic charge carriers in response to a local Coulomb potential.

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