The overall goal of this protocol is to remove the effect of shot-noise from lithographic patterns using nanoparticles and resist reflow techniques. This nanopatterning technique allows the removal of Shot-noise from extreme UV and E-Beam lithography's currently planned in fabricating advanced semiconductor devices, such as, micro-processors and memory chips. The main advantage of this technique is that the steps are easily implemented.

In current semiconductor processing fabs, without extensive modification of existing duel sets. The implication of this technique extends toward our ability to craft sub-20 nanometer patterns because it will deduce dimensional fluctuation from optical and chemical shot-noise effect. Generally, individuals new to this method will struggle because it requires familiarity with bottom-up and top-down processing methods, such as, sub fact self assembly and projection lithography.

Demonstrating the procedure will be Dr.Moshood Morakinyo currently at Intel. And he will be assisted by Srikar Rao, a Graduate student in my lab. To being the procedure, prepare SC-1 and SC-2 solutions for the RCA cleaning method.

Immerse the silicon wafer in the SC-1 and SC-2 solutions in turn for 10 minutes each at 70 degrees Celsius. Rinse the wafer with deionized water after each immersion and then dry the wafer in a stream of Nitrogen gas. Next, soak the clean, dry silicon wafer in a 0.05 molar solution of AATMS in dry toluene at 80 degrees Celsius for 20 minutes to derivatize the wafer surface.

Sonicate the wafer in toluene at room temperature for five minutes at 100 watts and dry the wafer with Nitrogen gas. Apply a photo-resist film of poly methyl methacrylate to the prepared wafer by spin coating. And then pattern holes in it with electron beam lithography.

Prepare a suspension of citrate capped gold nanoparticles of a smaller diameter than the patterned holes. The GNP concentration may range from 5.7 times 10 to the 9th to 10 to the 12th nanoparticles per milliliter depending on the GNP size. To deposit GNPs in the patterned contact holes by immersion, soak the patterned wafer in the suspension for 24 to 48 hours, depending on the GNP size.

Alternatively, to deposit GNPs by evaporation, first place the patterned wafer on the flat surface, spread drops of GNP suspension over the entire surface of the wafer. Keep the wafer on a hot plate at 30 to 35 degrees Celsius for 10 minutes to evaporate the solvent. After GNP deposition, ultrasonicate the wafer in a deionized water bath for 50 seconds at 100 watts.

Dry the wafer with Nitrogen gas. To perform top-down scanning electron microscopy of the wafers, set the electron beam to the lowest possible acceleration voltage and current to reduce the damage to the photo resist film during imaging. Heat the wafer on a hot-plate at 100 degrees Celsius for three minutes to facilitate reflow of the PMMA photo resist around the deposited GNPs.

Dry etch the wafer with Oxygen plasma for about 55 seconds to expose the GNPs in the contact holes without completely removing the PMMA film. Monitor the etching rate throughout the process to ensure that the PMMA film is not completely removed. Then, wet etch the GNPs for 10 minutes with a solutions of 1.0 grams of Iodine crystals and 4.0 grams of Potassium Iodide and 40 milliliters of deionized water to remove the GNPs from the film.

Image the wafer with scanning electron microscopy. Calculate the hole centers, GNP displacement, particle count, particle density, and fill fraction from the SCM images before and after reflow and etching. Using this method, 20 nanometer GNPs were deposited in 80 nanometer holes patterned in a PMMA coated silicon wafer.

The PMMA photo resist was heated to just below it's glass transition temperature to enable photo resist reflow around the GNPs, erasing the nano-hole patterns, created by electron bean lithography. After re-exposing the GNPs by dry etching, the GNPs were removed by wet etching, leaving 20 nanometer diameter holes in the PMMA film and the same arrangement as the original pattern. When the immersion deposition method was used, 93%of the holes were singularly occupied and 95%of the particles were deposited within 18 nanometers of the hole centers.

The evaporation method resulted in many holes being occupied by multiple GNPs, indicating that the process requires further optimization. Extraction of the contribution of photo resist reflow on displacement of the 20 nanometer GNPs, indicated that the reflow process had a negligible effect on GNP positioning. The coefficient of variation of the 20 nanometer holes created by this method was determined to be about 9%which was comparable to the coefficient of GNPS size variation.

This was roughly a six fold improvement over the predicted CV of electron beam lithography patterned 20 nanometer holes and about a 60%improvement over the predicted CV of the original 80 nanometer holes. Once mastered, this technique can be done in 24 hours if it is performed properly. While attempting this procedure, remember to use mono-dispersed nanoparticles and mild ultrasonication to remove loosely bound nanoparticles on the resist surface.

Though this method has been demonstrated using E-Beam lithography, it can also be applied to other systems based on extreme UV, X-ray, or other high energy exposure systems. I developed this idea for this method during an Intel sponsored project on lithography. Now this technique provides a new approach to remove effects of shot-noise and line edge roughness in lithography.

After watching this video, you should have a good understanding of how to deposit nanoparticles, reflow resist and etch nanoparticles to reduce shot-noise in nano fabrication.