The overall goal of this procedure is to prepare and demonstrate an experimental set up for trapping ytterbium ions that includes a micro-fabricated chip. Ion trap technology has been considered as one of the leading candidates for physical implementation of quantum information processing. This procedure provides the detailed protocols for micro-fabricating a trapped chip as well as, for constructing an experimental set up, to trap ions, using the micro-fabricated trap chip.
Ion trap systems developed by the micro-fabrication technology, provide great potential for quantum information processing and quantum computing. And the protocols presented here, will guide through the fabrication process and setting up ion trap experiments. Visual demonstration of this method is critical because it requires orchestration of various components such as, lasers, imaging systems, a vacuum chamber, electronics and micro-fabrication.
To perform the experiment, one first needs to fabricate the surface ion trapped chip. This is an example of a chip mounted in a carrier that is used in this demonstration. The chip's features are represented in this schematic, there is a loading slot, through which neutral atoms are introduced.
On either side of the loading slot, there are radio frequency electrodes to confine ions in directions perpendicular to the slot. DC voltages on the outer electrodes confined ions along this slot. DC voltages on the inner electrodes, help tilt the principle axis of the total potential.
For the experiment, mount the packaged chip in an ultra high vacuum chamber. In this case, the chip is at the center of a spherical octagon chamber. The elements of the ultra high vacuum system are represented in this schematic overview.
The ion pump and non-evaporative getter, can achieve pressures below 3 x 10 to the 11th Torr. The spherical octagon includes an oven ploated with the ytterbium atoms. The spherical octagon is represented at the center of this schematic of the final optical set up.
The micro-fabricated chip is at the center of the octagon. Feed throughs allow electrical connections to the chip electrodes in the octagon's oven. The optical elements are arranged so that three diode lasers produce beams that overlap at the trapping position.
A recessed view port in the spherical octagon, allows an imaging lens to be close to the chip's surface. Image the surface of the chip with an electron multiplying CCD camera. Connect multi channel cables to a digital to analog converter.
Connect the other end of the multi channel cables to the feed throughs of the spherical octagon. In addition, make the appropriate feed through connections to a helical resonator. Next, work with the resonator, a spectrum analyser and a directional coupler.
Connect the output of the RF generator to the output of the directional coupler. Then connect the input of the resonator, with the input port of the directional coupler. Connect the forward coupled port to the RF input of the spectrum analyser.
Terminate the reverse coupled port, with a 50 ohm resistor. Now, prepare to adjust the helical resonator cap. Set the position of the helical resonator cap, then scan the frequencies of the generator, to identify the frequency at which the reflection is minimum.
Continue to tune the resonator by adjusting the cap position. Meanwhile, monitor the frequency scan to find the frequency of the global minimum of reflected power. On finding the global minimum, lock the position of the resonator cap.
Turn off the RF generator before continuing. To continue, have all the lasers in place, stabilized and blocked for safety. Unblock the 369.5 nanometer laser and collimate the beam.
The beam should propagate toward the trapped chip. Align the beam parallel to the chip and almost touching its surface. Use a beam card, opposite the beam entry point to test the alignment, around spot, indicates that the beam does not reflect off any surface.
Next, mount a focusing lens on a translation stage. Place the lens, so as to focus the beam near the trapping potential, still parallel to the chip surface. Move on to work with the imaging optics.
Choose a high numerical aperture imaging lens mounted on a translation stage. Place this in front of the ultra high vacuum chambers recessed window. This is a schematic view of the set up with the imaging lens in place.
Next, align the laser beam, so there is some scattering from the chip surface. Use a beam card as before to verify the beam is partially blocked. Move on to place the beam card near the image plane of the imaging lens.
Adjust the imaging lens position with a translation stage. The new position should allow the scattered light to produce a sharp image on the beam card. Now, place an electron multiplying CCD on the translation stage in the imaging plane of the lens.
In front of the CCD, place a bandpass filter to block background light. The electrodes should be visible, using the CCD and lens set up. Next, align the beam vertically so it will pass through the trapping potential.
Then monitor the beam and move it towards the trap surface. Assume maximum beam scatter, means the beam center is on the chip surface. Now, use the lens translation stage to move the beam to the expected height of the trapping potential.
After that adjustment, move the translation stages of the imaging lens and the CCD back by the same distance and note the position. This is the schematic view of the system at this point. The beam passes through the expected trap position.
Continue after unblocking the other two lasers and begin aligning them. Replace the bandpass filter in front of the CCD, with a 399 nanometer bandpass filter. Then adjust the imaging lens and CCD positions to bring the electrodes into focus on the CCD.
Align the collimated 399 nanometer beam, to enter the vacuum chamber, propagating in the opposite direction to the 369.5 nanometer beam and to overlap it. Introduce a mirror and dichroic mirror to combine the two beams so they co-propagate in the chamber. For testing, temporarily add a mirror to the beam path before the chamber and check beam overlap with a beam profiler.
Introduce a focusing lens on a translation stage in the beam path between the dichroic and temporary mirrors. Use the beam profiler to check the focus of the two beams. In this case, the two lasers are not focused at the same point as they should be.
Finally, align the 935 nanometer laser to bring the lasers into coincidence. Once this is done, remove the temporary mirror and be certain the 399 nanometer beam can be observed in the CCD. Vertically align the beam with the expected trap position and then move the beam toward the chip.
Monitor the CCD image and associate the maximum intensity of scattered light, with the beam being centered on the chip surface. Then move the beam from the surface to the expected position of the trap. Follow this by moving the imaging lens and CCD back the same distance.
Then, set the 399 nanometer laser close to the appropriate ytterbium 174 transition. Monitor the CCD image as the oven with ytterbium is turned on and the current is increased. Do this while sweeping the laser through the ytterbium resonance, to identify the start of evaporation, by observing fluorescence.
Note the current value just before fluorescence and turn the oven off. Make the final preparation for trapping ions. Return to the bandpass filter at the CCD and replace it with a 369.5 nanometer bandpass filter.
In addition, adjust the CCD and imaging lens positions for the 368.5 nanometer focus. Set the voltages for the digital to analog converter controlling the electrodes. Then go to the RF generator attached to the helical resonator.
Turn on the generator at a very low power setting and gradually increase the output power. At the laser control computer, set the laser frequencies and oven current source to their appropriate values. After a few minutes, briefly block the 935 nanometer laser for one to two seconds to start a test for trapping.
View the trap with the CCD. If ions are trapped, the scattering rate drop significantly and the image is noticeably affected. Block the laser a few times to check the blocking correlates with image changes.
Once ions are trapped, turn off the oven. This composite of electron multiplying CCD images, suggests the location of five ytterbium 174 1+ions trapped in a micro-fabricated ion trap chip. The number of trapped ions can be varied by changing the applied DC voltages.
In this video of trapped ions, the ions are being manipulated by varying the DC voltages of the trap. The protocols for fabricating surface ion traps and trapping ytterbium 174 isotope ions, were presented in this video. This procedure can be easily extended to trap ytterbium ions of isotope 171 and manipulate cubic stage, ultimately moving towards quantum information processing and quantum computing.
