Nous remercions KY Tan, P.-Siège et GC Tettamanzi pour des discussions utiles. Nous reconnaissons l&#39;appui financier du Conseil australien de la recherche (subvention n ° DP120104710), l&#39;Académie de Finlande (Grant No. 251748, 135794, 272806) et le soutien de l&#39;installation de fabrication nationale australienne pour la fabrication de dispositifs. AR reconnaît le soutien financier du régime de subvention du chercheur de l&#39;Université de New South Wales en début de carrière. La fourniture d&#39;installations et de soutien technique par l&#39;Université Aalto à Micronova Centre nanofabrication est également reconnu.

Remarque: Ce protocole décrit les procédures utilisées pour fabriquer, emballer et tester des pompes à électron unique à base de silicium technologie MOS QD. Les étapes décrites dans les sous-sections 1 et 2 sont effectuées dans une salle blanche de ISO5, tandis que ceux de l&#39;article 3 sont effectuées dans les laboratoires de ISO6. Les conditions ambiantes sont contrôlées en permanence. Les valeurs nominales de température et d&#39;humidité sont fixées à 20 ± 1 ° C et 55% ± 5%, respectivement. 1. microfabrication <ol><li> Champ Oxide <ol><li> Nettoyer la plaquette par immersion dans ce qui suit: gravure de piranha (10 min), désionisée (DI) de l&#39;eau (10 min), RCA-deux solutions (DI eau 175 ml, HCl 30 ml, H 2 O 2 30 ml à 100 ° C pendant 10 min), de l&#39;eau désionisée (5 min), fluorhydrique (HF) de l&#39;acide dilué dans l&#39;eau 10: 1 (10 sec), de l&#39;eau déminéralisée (10 min). Utilisez des vêtements de protection lors de la manipulation HF (à savoir, lunettes, tablier PVC, et des gants en PVC). Procédez dans l&#39;ordre indiqué. </li><li> Placer la plaquettedans le four d&#39;oxydation à 900 ° C et d&#39;oxyder dans les étapes comme suit: O 2 sec (10 min), O 2 humide (40 min), O 2 sec (10 min), N 2 (15 min). </li></ol></li><li> Contacts ohmiques <ol><li> Effectuer photolithographie et gravure de l&#39;oxyde. <ol><li> Déposer une couche de promoteur d&#39;adhérence hexaméthyldisilazane (HMDS) quelques nm d&#39;épaisseur sur la surface de la plaquette comme suit: pré-cuire sur une plaque chauffante à 110 ° C pendant 1 min, versez ~ 50 ml de HMDS dans un récipient en verre, placer le bécher et la plaquette dans la chambre à vide, évacuer et d&#39;attendre 2 min. </li><li> Spin une couche 2-4 um d&#39;épaisseur de résine photosensible à la fois sur le dos et les côtés avant de la tranche (3000-5000 rpm, 25-40 sec selon l&#39;épaisseur souhaitée). </li><li> Exposer à la lumière ultra-violette d&#39;alignement de masque (10 mW / cm 2 pour 4-10 sec selon résister épaisseur). Post-cuisson sur une plaque chauffante à 110 ° C pendant 1 min. </li><li> Développer pour 1-2 minutes, puis rincer à l&#39;eau déminéralisée. </li&gt; <li> Effectuer gravure plasma O 2 pendant 20 min (pression = 340 mTorr, puissance incidente = 50 W; la puissance réfléchie &lt;1 W). </li><li> Oxyde gravure dans une solution d&#39;acide HF tamponnée (15: 1, 4-5 min, gravure 20 nm / min de la vitesse à 30 ° C). Rincer à l&#39;eau déminéralisée (5 min). Sécher avec N 2. </li></ol></li><li> Retirer le photorésist par immersion dans de l&#39;acétone. Rincer à l&#39;isopropanol (IPA), puis sécher avec N 2. </li><li> Passer plaquette dans un four à 1000 ° C avec une source de phosphore (N 2 flux de 30 à 45 min en fonction de la densité de dopage désiré). </li><li> Enlever la couche d&#39;oxyde contaminée avec de l&#39;acide HF dilué dans l&#39;eau (10: 1, 3-4 min, 40 nm / min de la vitesse de gravure à 30 ° C), rincer à l&#39;eau déminéralisée (10 min). </li><li> Oxyder comme dans 1.1.2. </li></ol></li><li> Oxyde de grille <ol><li> Répétez les étapes 1.2.1 et 1.2.2. </li><li> Placez plaquette dans un four dédié à 800 ° C et d&#39;oxyder dans les étapes comme suit: O 2 sec (10 min), dichloroethylene + O 2 (20 min), O 2 sec (10 à 30 min en fonction de l&#39;épaisseur désirée d&#39;oxyde), N 2 (15 min). </li></ol></li><li> Contacts ohmiques métallisation <ol><li> Répétez l&#39;étape 1.2.1. </li><li> Placez plaquette dans l&#39;évaporateur à faisceau d&#39;électrons. Évaporer 100 nm de l&#39;aluminium à 0,2-0,5 nm / s et 5 x 10 -6 Torr. </li><li> Faire tremper la plaquette en N-méthyl-2-pyrrolidone (NMP) sur plaque chauffante à 80 ° C pendant 1 heure pour enlever le métal. Utilisez agitation ultrasonique si nécessaire. Rincer à l&#39;IPA pendant 2 min. Sécher avec N 2. </li><li> Recuit dans la formation de gaz à 400 ° C pendant au moins 15 min. </li></ol></li></ol> 2. nanofabrication <ol><li> Wafer Dicing <ol><li> Spin toute résister sur la plaquette d&#39;agir comme revêtement de protection (type de paramètres de polymères et de filage ne sont pas pertinentes à ce stade). </li><li> Utilisez diamant pointe dicer pour couper la tranche en puces individuelles de ~ 10 x 2 mm 2. </li></ol></li><li>Nettoyage <ol><li> Faire tremper dans la NMP pendant 1 heure sur plaque chauffante à 80 ° C, puis rincer dans de l&#39;IPA pendant 2 min. Sécher avec N 2. </li><li> Effectuer gravure plasma O 2 pendant 5 min (puissance incidente = 50 W; la puissance réfléchie &lt;1 W). </li><li> Spin propre avec de l&#39;acétone et de l&#39;IPA (7500 rpm, 30 sec) </li></ol></li><li> marqueurs d&#39;alignement de motifs <ol><li> Spin polyméthacrylate de méthyle (PMMA 950k) A4 résist (5,000-7,500 rpm, 30 secondes en fonction de l&#39;épaisseur souhaitée). Épaisseur de travail typique ≈ 150-200 nm. Cuire la résine sur une plaque chauffante à 180 ° C pendant 90 sec. </li><li> Effectuer la lithographie par faisceau d&#39;électrons. Utiliser les conditions d&#39;écriture suivantes: l&#39;énergie du faisceau = 30 keV, courant de faisceau de 30 pA, dose de zone ≈ 500-650 uC / cm 2 en fonction de la taille des marqueurs et de résister à l&#39;épaisseur. </li><li> Développer le résister dans une solution de méthylisobutylcétone et de l&#39;IPA (1: 3) pour 40-60 sec, puis rincer dans de l&#39;IPA pendant 20 sec. Sécher avec N 2 pistolet. </li><li> Endroitla puce dans l&#39;évaporateur à faisceau d&#39;électrons. Évaporer 15 nm de Ti et 65 nm de Pt à 0,2-0,4 nm / s et 5 x 10 -6 Torr. </li><li> Soulevez le métal comme à l&#39;étape 1.4.3. </li><li> Clean puce comme dans les étapes 2.2.2-2.2.3. </li></ol></li><li> Porte motifs <ol><li> Spin résister en 2.3.1. </li><li> Effectuer la lithographie par faisceau d&#39;électrons. Utiliser les conditions d&#39;écriture suivantes pour les fonctions à haute résolution: l&#39;énergie du faisceau = 30 keV, courant de faisceau de 30 pA, dose de zone ≈ 500-700 uC / cm 2. Ecrire conditions pour les fonctions à faible résolution: l&#39;énergie du faisceau = 15 keV, courant de faisceau de 10 nA, dose de zone ≈ 400-600 uC / cm 2. </li><li> Développer la réserve comme dans 2.3.3. </li><li> Placez la puce dans l&#39;évaporateur thermique. Al s&#39;évaporer à 0,1-0,4 nm / s et 1-9 x 10 -6 mbar. l&#39;épaisseur de la cible varie en fonction du nombre de couches, comme représenté sur la figure 2B (25-35 nm pour la couche 1, de 45 à 65 nm pour la couche 2, de 75 à 90 nm pour Layer 3). </li><li> Soulevez le métal comme à l&#39;étape 1.4.3. </li><li> Effectuer Al oxydation sur une plaque de cuisson à 150 ° C pendant 5-10 min. </li><li> Clean puce à l&#39;étape 2.2.3. </li><li> Répétez les étapes 2.4.1-2.4.7 deux fois pour réaliser le 3-couche empilement de grille. </li></ol></li></ol> 3. Dispositif d&#39;emballage <ol><li> Chip Dice comme dans l&#39;étape 2.1 </li><li> Rincer les petites puces dans de l&#39;acétone et de l&#39;IPA résultant pendant 2 minutes. </li><li> Collez un morceau individuel à une carte de circuit imprimé (PCB) avec le PMMA A5. Attendre 2 min pour sécher. Sinon, pour améliorer la thermalisation, utilisez époxy d&#39;argent. </li><li> Chargez le PCB sur une colle de coin et de procéder au câblage. </li></ol> 4. Dispositif tests d&#39;intégrité <ol><li> Montez le PCB contenant le dispositif câblé sur une sonde d&#39;immersion. </li><li> Câbler les lignes électriques du PCB à ceux de la sonde d&#39;immersion. </li><li> Insérez la sonde dans un récipient contenant de l&#39;hélium liquide. Procéder lentement pour éviter excessive hélium bhuile-off. </li><li> Pour chaque porte de l&#39;appareil, connectez l&#39;électrode à température ambiante correspondante de la sonde à une unité source de mesure, tout en gardant les autres portes à la terre. Régler le courant de la conformité à quelques nA. Balayer la tension de zéro à 1,5 V par pas de 0,1 V, mesurer et enregistrer le courant. </li><li> Connecter chaque ligne de grille à une source de tension continue variable de batterie, la ligne de source pour le haut-source de tension en courant alternatif d&#39;un amplificateur lock-in, et la conduite d&#39;évacuation à l&#39;orifice de l&#39;amplificateur à verrouillage d&#39;entrée. </li><li> Mesurer la source-drain conductance pour différentes configurations de tension de grille (voir Figure 4). <ol><li> Globalement rampe jusqu&#39;à les tensions appliquées aux portes BL, BR, PL, SL et DL, en gardant C1 et C2 portes à la terre. Notez les caractéristiques de l&#39;appareil «Turn-sur». </li><li> Individuellement rampe en bas de chaque tension de grille et enregistrer les caractéristiques de pinch-off &#39;les portes. </li><li> Régler les tensions de grille pour définir électrostatique d&#39;un qudot antum en réglant les tensions sur BL et BR (PL, SL et DL) plus petit (plus) que le turn-on tensions. Enregistrer les caractéristiques de blocage de Coulomb. </li></ol></li></ol>

<ol>
	<li>Sze, S. M. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=.">.</a> Physics of Semiconductor Devices. , 505-566 (1969).</li><li>Moore, G. E. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=Cramming+More+Components+onto+Integrated+Circuits.">Cramming More Components onto Integrated Circuits.</a> Electronics. 38, 114-117 (1965).</li><li>Voisin, B., et al. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=Few-Electron+Edge-State+Quantum+Dots+in+a+Silicon+Nanowire+Field-Effect+Transistor.">Few-Electron Edge-State Quantum Dots in a Silicon Nanowire Field-Effect Transistor.</a> Nano Lett. 14 (4), 2094-2098 (2014).</li><li>Asenov, A., Brown, A. R., Davies, J. H., Savas, K., Slavcheva, G. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=Simulation+of+Instrinsic+Parameter+Fluctuations+in+Decananometer+and+Nanometer-Scale+MOSFETs.">Simulation of Instrinsic Parameter Fluctuations in Decananometer and Nanometer-Scale MOSFETs.</a> IEEE Trans Electron Devices. 50 (9), 1837-1852 (2003).</li><li>Zwanenburg, F. A., et al. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=Silicon+Quantum+Electronics.">Silicon Quantum Electronics.</a> Rev. Mod. Phys. 85 (3), 961-1019 (2013).</li><li>Ladd, T. D., et al. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=Quantum+computers.">Quantum computers.</a> Nature. 464 (7285), 45-53 (2010).</li><li>Piquemal, F. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=Genev&#232;s,+G.+for+a+direct+realization+of+the+quantum+metrological+triangle.">Genev&#232;s, G. for a direct realization of the quantum metrological triangle.</a> Metrologia. 37 (3), 207-211 (2000).</li><li>Angus, S. J., Ferguson, A. J., Dzurak, A. S., Clark, R. G. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=Gate-Defined+Quantum+Dots+in+Intrinsic+Silicon.">Gate-Defined Quantum Dots in Intrinsic Silicon.</a> Nano Lett. 7 (7), 2051-2055 (2007).</li><li>Gonzalez-Zalba, M. F., Heiss, D., Podd, G., Ferguson, A. J. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=Tunable+aluminium-gated+single+electron+transistor+on+a+doped+silicon-on-insulator+etched+nanowire.">Tunable aluminium-gated single electron transistor on a doped silicon-on-insulator etched nanowire.</a> Appl. Phys. Lett. 101 (10), 103504-103501 (2014).</li><li>Lim, W. H., et al. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=Observation+of+the+single-electron+regime+in+a+highly+tunable+silicon+quantum+dot.">Observation of the single-electron regime in a highly tunable silicon quantum dot.</a> Appl. Phys. Lett. 95 (24), 242102-242103 (2009).</li><li>Yang, C. H., et al. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=Spin-valley+lifetimes+in+silicon+quantum+dots+with+tunable+valley+splitting.">Spin-valley lifetimes in silicon quantum dots with tunable valley splitting.</a> Nat. Commun. 4 (2069), (2013).</li><li>Chan, K. W., et al. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=Single-electron+shuttle+based+on+a+silicon+quantum+dot.">Single-electron shuttle based on a silicon quantum dot.</a> Appl. Phys. Lett. 98 (21), 212103-212101 (2011).</li><li>Rossi, A., et al. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=An+accurate+single-electron+pump+based+on+a+highly+tunable+silicon+quantum+dot.">An accurate single-electron pump based on a highly tunable silicon quantum dot.</a> Nano Lett. 14 (6), 3405-3411 (2014).</li><li>Pekola, J. P., et al. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=Single-electron+current+sources:+Toward+a+refined+definition+of+the+ampere.">Single-electron current sources: Toward a refined definition of the ampere.</a> Rev. Mod. Phys. 85 (4), 1421-1472 (2013).</li><li>Giblin, S. P., et al. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=Towards+a+quantum+representation+of+the+ampere+using+single+electron+pumps.">Towards a quantum representation of the ampere using single electron pumps.</a> Nat. Commun. 3, 930 (2012).</li><li>Kouwenhoven, L. P., Austing, D. G., Tarucha, S. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=Few-electron+quantum+dots.">Few-electron quantum dots.</a> Rep. Prog. Phys. 64 (6), 701-736 (2001).</li><li>Veldhorst, M., et al. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=An+addressable+quantum+dot+qubit+with+fault-tolerant+control+fidelity.">An addressable quantum dot qubit with fault-tolerant control fidelity.</a> Nat. Nanotech. 9 (12), 981-985 (2014).</li><li>Fujiwara, A., Nishiguchi, K., Ono, Y. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=Nanoampere+charge+pump+by+single-electron+ratchet+using+silicon+nanowire+metal-oxide-semiconductor+field-effect+transistor.">Nanoampere charge pump by single-electron ratchet using silicon nanowire metal-oxide-semiconductor field-effect transistor.</a> Appl. Phys. Lett. 92 (4), 042102-1-042102-3 (2008).</li><li>Jehl, X., et al. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=Hybrid+Metal-Semiconductor+Electron+Pump+for+Quantum+Metrology.">Hybrid Metal-Semiconductor Electron Pump for Quantum Metrology.</a> Phys. Rev. X. 3 (2), 021012-1-021012-7 (2013).</li><li>Tettamanzi, G. C., Wacquez, R., Rogge, S. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=Charge+pumping+through+a+single+donor+atom.">Charge pumping through a single donor atom.</a> New J. Phys. 16 (6), 063036-1-063036-17 (2014).</li><li>Koppinen, P. J., Stewart, M. D., Zimmerman, N. M. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=Fabrication+and+Electrical+Characterization+of+Fully+CMOS-Compatible+Si+Single-Electron+Devices.">Fabrication and Electrical Characterization of Fully CMOS-Compatible Si Single-Electron Devices.</a> IEEE Trans Electron Devices. 60 (1), 78-83 (2013).</li><li>Fletcher, J. D., et al. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=Stabilization+of+single-electron+pumps+by+high+magnetic+fields.">Stabilization of single-electron pumps by high magnetic fields.</a> Phys. Rev. B. 86 (15), 155311-1-155311-6 (2012).</li><li>Kataoka, M., et al. <a target="_blank" href="http://www.ncbi.nlm.nih.gov/entrez/query.fcgi?db=PubMed&cmd=Search&doptcmdl=Citation&defaultField=Title+Word&term=Tunable+Nonadiabatic+Excitation+in+a+Single-Electron+Quantum+Dot.">Tunable Nonadiabatic Excitation in a Single-Electron Quantum Dot.</a> Phys. Rev. Lett. 106 (12), 126801-1-126801-4 (2011).</li></ol>

Les auteurs ont rien à révéler.

Le protocole indiqué dans le présent document décrit les techniques pour fabriquer du silicium MOS QDs, ainsi que les procédures expérimentales pour tester leur intégrité fonctionnelle et les gérer comme des pompes à électron unique. Remarquablement, en adaptant la conception de grille, le même processus de fabrication peut être utilisé pour produire des dispositifs appropriés pour la lecture de bit quantique et de contrôle 17, ainsi que de pompage de charge 12,13. Nous notons que la plupart des paramètres du processus cités dans cet article peuvent varier selon les outils de fabrication utilisés (étalonnage, marque ou le modèle), ainsi que sur le type de substrat de silicium (épaisseur et la densité de dopage de fond). Des quantités telles que la dose d&#39;exposition de lithographie ou de temps de développement, de gravure ou de la durée d&#39;oxydation, doivent être soigneusement calibrés et testés pour assurer un rendement fiable. En outre, il est essentiel d&#39;éviter la contamination croisée résultant de l&#39;utilisation des mêmes outils de fabrication des différents processus. A cette fin, un certain nombre de critical étapes sont effectuées avec du matériel exclusivement dédiée au traitement de silicium tels que des évaporateurs de métaux, des fours à oxygène et des bains de HF. Plus généralement, le silicium attire un intérêt croissant en tant que matériau de choix pour réaliser des pompes de charge 18-20. Ceci est partiellement dû à la perspective attrayante de mettre en œuvre une nouvelle norme de courant électrique basé quantique en utilisant un procédé de silicium industrie compatible. Cela bénéficier de techniques d&#39;intégration bien établies et fiables pour l&#39;évolutivité, la parallélisation et les frais généraux de conduite. Surtout, un MOS complémentaire (CMOS) complet, dépourvu de métal traditionnel comme le matériau de grille, a montré fortement réduits fond fluctuations de charge dans les dispositifs à électron unique 21. Ces fluctuations peuvent être nocifs pour atteindre une précision métrologique. Le protocole décrit ici est limitée à la réalisation de nano-dispositifs MOS avec des portes en métal. Par conséquent, pour Achieve compatibilité industrielle complète et à réduire les fluctuations de charge, il serait nécessaire de modifier les techniques de dépôt de grille et utiliser du silicium polycristallin fortement dopé que le matériau de grille. En conclusion, les pompes MOS QD discutés ici ont récemment combiné l&#39;avantage technologique de silicium avec de très bonnes performances en termes de génération actuelle précise 13. Cette situation découle de la grande flexibilité du processus de conception et de fabrication qui permettent d&#39;empiler plusieurs couches de grille menant à un système compact et polyvalent. L&#39;accordabilité amende résultant du confinement électrostatique de la dot avec le potentiel de réduire les fluctuations de charge fond ouvre la voie pour surmonter les principaux défis observés dans d&#39;autres semi-conducteurs pompes 22,23.

Silicon is the material of choice for most of the modern microelectronics. Its properties, combined with advanced lithographic techniques, have allowed the semiconductor industry to achieve very large-scale integration and deliver billions of transistors per chip. The metal-oxide-semiconductor (MOS) technology1 has been the key of this relentless technological progress2. In brief, it is based on a selectively doped Si substrate which is thermally oxidized to grow a high quality SiO2 gate oxide on which a metal gate electrode is deposited. Recently, it has been shown that the use of a stack of gate oxides could be beneficial3 . While present industry standards have reached minimum feature sizes for gate lengths below 20 nm, it is becoming increasingly evident that, at this level of miniaturization, detrimental quantum mechanical phenomena come into play that may complicate further downscaling4.
Remarkably, silicon is also an excellent host material to exploit the quantum properties of the electron charge and spin5. This has broadened its range of applicability to entirely new fields such as quantum computing6 and quantum electrical metrology7. Among other approaches5, the use of a multi-gate MOS technology8,9 has led to electrostatically-defined quantum dots (QD) whose occupancy can be controlled down to single-electron level10. Unlike the conventional MOS process where just one gate per transistor is needed1, these QDs are defined via a three-layer stack of Al/AlyOx gates which are used to selectively accumulate electrons at the Si/SiO2 interface, as well as provide lateral and vertical confinement11.
Although these devices had been originally developed for quantum computing applications, they have also recently shown promising performances as metrological tools12,13. In the field of quantum electrical metrology, a long-standing goal is the redefinition of the unit ampere in terms of the elementary charge (e) 14. In particular, the emphasis is on the realization of nano-scale charge pumps to clock the transfer of individual electrons timely and accurately. These devices generate macroscopic quantized electric currents, I=nef, where f is the frequency of an external driving oscillator and n is an integer. To date, the best performance has been achieved with a GaAs-based pump by yielding a current in excess of 150 pA with a relative uncertainty of 1.2 parts per million15. Recently, silicon MOS QDs have also stood out for the implementation of highly accurate single-electron pumps thanks to the capability of finely tuning the charge confinement13.
Here, we discuss the protocol used for the fabrication of silicon MOS QDs. Furthermore, the cryogenic set-up used to test the integrity of the devices after fabrication and the one to perform charge pumping experiments are described. Finally, representative measurements of quantized electric current are reported.

<table border="0" cellpadding="0" cellspacing="0">
	<tbody>
		<tr>
			<td>Silicon wafers</td>
			<td>TOPSIL</td>
			<td></td>
			<td>4 inch</td>
		</tr>
		<tr>
			<td>Electron-beam lithography machine</td>
			<td>Raith gmbh</td>
			<td></td>
			<td>Raith 150two</td>
		</tr>
		<tr>
			<td>E-beam resist&#160;</td>
			<td>MicroChem gmbh</td>
			<td></td>
			<td>PMMA</td>
		</tr>
		<tr>
			<td>Photoresist</td>
			<td>MicroChem gmbh</td>
			<td></td>
			<td>nLOF2020</td>
		</tr>
		<tr>
			<td>Mask aligner</td>
			<td>Quintel</td>
			<td></td>
			<td>Q6000</td>
		</tr>
		<tr>
			<td>Photoresist developer</td>
			<td>MicroChem gmbh</td>
			<td></td>
			<td>AZ826MIF</td>
		</tr>
	</tbody>
</table>

silicon metal-oxide-semiconductor quantum dots for single-electron pumping

As mass-produced silicon transistors have reached the nano-scale, their behavior and performances are increasingly affected, and often deteriorated, by quantum mechanical effects such as tunneling through single dopants, scattering via interface defects, and discrete trap charge states. However, progress in silicon technology has shown that these phenomena can be harnessed and exploited for a new class of quantum-based electronics. Among others, multi-layer-gated silicon metal-oxide-semiconductor (MOS) technology can be used to control single charge or spin confined in electrostatically-defined quantum dots (QD). These QD-based devices are an excellent platform for quantum computing applications and, recently, it has been demonstrated that they can also be used as single-electron pumps, which are accurate sources of quantized current for metrological purposes. Here, we discuss in detail the fabrication protocol for silicon MOS QDs which is relevant to both quantum computing and quantum metrology applications. Moreover, we describe characterization methods to test the integrity of the devices after fabrication. Finally, we give a brief description of the measurement set-up used for charge pumping experiments and show representative results of electric current quantization.

Watch this Scientific Journal Video about Silicon Metal-oxide-semiconductor Quantum Dots for Single-electron Pumping at JoVE.com

Silicon Metal-oxide-semiconductor Quantum Dots for Single-electron Pumping

The fabrication process and experimental characterization techniques relevant to single-electron pumps based on silicon metal-oxide-semiconductor quantum dots are discussed.

Silicium métal-oxyde-semiconducteur Quantum Dots pour le pompage mono-électronique

As mass-produced silicon transistors have reached the nano-scale, their behavior and performances are increasingly affected, and often deteriorated, by ...

silicon-metal-oxide-semiconductor-quantum-dots-for-single-electron

Research

Education

JoVE Core

JoVE Journal

Electrical Engineering

Engineering

Unit 1

Basics of Semiconductors

SCIENTISTS IN ACTION

14.2K vues.  University of New South Wales. The fabrication process and experimental characterization techniques relevant to single-electron pumps based on silicon metal-oxide-semiconductor quantum dots are discussed.

Vidéo: Silicon Metal-oxide-semiconductor Quantum Dots for Single-electron Pumping

Compact Quantum Dots for Single-molecule Imaging

Single-molecule imaging is an important tool for understanding the mechanisms of biomolecular function and for visualizing the spatial and temporal heterogeneity of molecular behaviors that underlie cellular biology 1-4. To image an individual molecule of interest, it is typically conjugated to a fluorescent tag (dye, protein, bead, or quantum dot) and observed with epifluorescence or total internal reflection fluorescence (TIRF) microscopy. While dyes and fluorescent proteins have been the mainstay of fluorescence imaging for decades, their fluorescence is unstable under high photon fluxes necessary to observe individual molecules, yielding only a few seconds of observation before complete loss of signal. Latex beads and dye-labeled beads provide improved signal stability but at the expense of drastically larger hydrodynamic size, which can deleteriously alter the diffusion and behavior of the molecule under study.
Quantum dots (QDs) offer a balance between these two problematic regimes. These nanoparticles are composed of semiconductor materials and can be engineered with a hydrodynamically compact size with exceptional resistance to photodegradation 5. Thus in recent years QDs have been instrumental in enabling long-term observation of complex macromolecular behavior on the single molecule level. However these particles have still been found to exhibit impaired diffusion in crowded molecular environments such as the cellular cytoplasm and the neuronal synaptic cleft, where their sizes are still too large 4,6,7.
Recently we have engineered the cores and surface coatings of QDs for minimized hydrodynamic size, while balancing offsets to colloidal stability, photostability, brightness, and nonspecific binding that have hindered the utility of compact QDs in the past 8,9. The goal of this article is to demonstrate the synthesis, modification, and characterization of these optimized nanocrystals, composed of an alloyed HgxCd1-xSe core coated with an insulating CdyZn1-yS shell, further coated with a multidentate polymer ligand modified with short polyethylene glycol (PEG) chains (Figure 1). Compared with conventional CdSe nanocrystals, HgxCd1-xSe alloys offer greater quantum yields of fluorescence, fluorescence at red and near-infrared wavelengths for enhanced signal-to-noise in cells, and excitation at non-cytotoxic visible wavelengths. Multidentate polymer coatings bind to the nanocrystal surface in a closed and flat conformation to minimize hydrodynamic size, and PEG neutralizes the surface charge to minimize nonspecific binding to cells and biomolecules. The end result is a brightly fluorescent nanocrystal with emission between 550-800 nm and a total hydrodynamic size near 12 nm. This is in the same size range as many soluble globular proteins in cells, and substantially smaller than conventional PEGylated QDs (25-35 nm).

We describe the preparation of colloidal quantum dots with minimized hydrodynamic size for single-molecule fluorescence imaging. Compared to conventional quantum dots, these nanoparticles are similar in size to globular proteins and are optimized for single-molecule brightness, stability against photodegradation, and resistance to nonspecific binding to proteins and cells.

Compact points quantiques pour une seule molécule d&#39;imagerie

Single-molecule imaging is an important tool for  understanding the mechanisms of biomolecular function and for visualizing the  spatial and temporal ...

Recherche

Ingénierie

Gradient Echo Quantum Memory in Warm Atomic Vapor

Gradient echo memory (GEM) is a protocol for storing optical quantum states of light in atomic ensembles. The primary motivation for such a technology is that quantum key distribution (QKD), which uses Heisenberg uncertainty to guarantee security of cryptographic keys, is limited in transmission distance. The development of a quantum repeater is a possible path to extend QKD range, but a repeater will need a quantum memory. In our experiments we use a gas of rubidium 87 vapor that is contained in a warm gas cell. This makes the scheme particularly simple. It is also a highly versatile scheme that enables in-memory refinement of the stored state, such as frequency shifting and bandwidth manipulation. The basis of the GEM protocol is to absorb the light into an ensemble of atoms that has been prepared in a magnetic field gradient. The reversal of this gradient leads to rephasing of the atomic polarization and thus recall of the stored optical state. We will outline how we prepare the atoms and this gradient and also describe some of the pitfalls that need to be avoided, in particular four-wave mixing, which can give rise to optical gain.

The gradient echo memory is a protocol for storing optical quantum states of light in atomic ensembles. Quantum memory is a key element of a quantum repeater, which can extend the range of quantum key distribution. We outline the operation of the scheme when implemented in a 3-level atomic ensemble.

Gradient Echo Quantum Mémoire chaud atomique de vapeur

Gradient  echo memory (GEM) is a protocol for storing optical quantum states of light in  atomic ensembles. The primary motivation for such a technology ...

Nanofabrication of Gate-defined GaAs/AlGaAs Lateral Quantum Dots

A quantum computer is a computer composed of quantum bits (qubits) that takes advantage of quantum effects, such as superposition of states and entanglement, to solve certain problems exponentially faster than with the best known algorithms on a classical computer. Gate-defined lateral quantum dots on GaAs/AlGaAs are one of many avenues explored for the implementation of a qubit. When properly fabricated, such a device is able to trap a small number of electrons in a certain region of space. The spin states of these electrons can then be used to implement the logical 0 and 1 of the quantum bit. Given the nanometer scale of these quantum dots, cleanroom facilities offering specialized equipment- such as scanning electron microscopes and e-beam evaporators- are required for their fabrication. Great care must be taken throughout the fabrication process to maintain cleanliness of the sample surface and to avoid damaging the fragile gates of the structure. This paper presents the detailed fabrication protocol of gate-defined lateral quantum dots from the wafer to a working device. Characterization methods and representative results are also briefly discussed. Although this paper concentrates on double quantum dots, the fabrication process remains the same for single or triple dots or even arrays of quantum dots. Moreover, the protocol can be adapted to fabricate lateral quantum dots on other substrates, such as Si/SiGe.

This paper presents a detailed fabrication protocol for gate-defined semiconductor lateral quantum dots on gallium arsenide heterostructures. These nanoscale devices are used to trap few electrons for use as quantum bits in quantum information processing or for other mesoscopic experiments such as coherent conductance measurements.

Nanofabrication de la porte définis-GaAs / AlGaAs latéraux Quantum Dots

A quantum computer is a computer composed of quantum bits (qubits) that takes advantage of quantum effects, such as superposition of states and ...

Scanning-probe Single-electron Capacitance Spectroscopy

The integration of low-temperature scanning-probe techniques and single-electron capacitance spectroscopy represents a powerful tool to study the electronic quantum structure of small systems - including individual atomic dopants in semiconductors. Here we present a capacitance-based method, known as Subsurface Charge Accumulation (SCA) imaging, which is capable of resolving single-electron charging while achieving sufficient spatial resolution to image individual atomic dopants. The use of a capacitance technique enables observation of subsurface features, such as dopants buried many nanometers beneath the surface of a semiconductor material1,2,3. In principle, this technique can be applied to any system to resolve electron motion below an insulating surface.
As in other electric-field-sensitive scanned-probe techniques4, the lateral spatial resolution of the measurement depends in part on the radius of curvature of the probe tip. Using tips with a small radius of curvature can enable spatial resolution of a few tens of nanometers. This fine spatial resolution allows investigations of small numbers (down to one) of subsurface dopants1,2. The charge resolution depends greatly on the sensitivity of the charge detection circuitry; using high electron mobility transistors (HEMT) in such circuits at cryogenic temperatures enables a sensitivity of approximately 0.01 electrons/Hz&frac12; at 0.3 K 5.

Scanning-probe single-electron capacitance spectroscopy facilitates the study of single-electron motion in localized subsurface regions. A sensitive charge-detection circuit is incorporated into a cryogenic scanning probe microscope to investigate small systems of dopant atoms beneath the surface of semiconductor samples.

Sonde à balayage spectroscopie de capacité unique électron

The integration of low-temperature scanning-probe techniques and single-electron capacitance spectroscopy represents a powerful tool to study the ...

Analysis of Contact Interfaces for Single GaN Nanowire Devices

Single GaN nanowire (NW) devices fabricated on SiO2 can exhibit a strong degradation after annealing due to the occurrence of void formation at the contact/SiO2 interface. This void formation can cause cracking and delamination of the metal film, which can increase the resistance or lead to a complete failure of the NW device. In order to address issues associated with void formation, a technique was developed that removes Ni/Au contact metal films from the substrates to allow for the examination and characterization of the contact/substrate and contact/NW interfaces of single GaN NW devices. This procedure determines the degree of adhesion of the contact films to the substrate and NWs and allows for the characterization of the morphology and composition of the contact interface with the substrate and nanowires. This technique is also useful for assessing the amount of residual contamination that remains from the NW suspension and from photolithographic processes on the NW-SiO2 surface prior to metal deposition. The detailed steps of this procedure are presented for the removal of annealed Ni/Au contacts to Mg-doped GaN NWs on a SiO2 substrate.

A technique was developed that removes Ni/Au contact metal films from their substrate to allow for the examination and characterization of the contact/substrate and contact/NW interfaces of single GaN nanowire devices.

Analyse des Interfaces de contact pour GaN appareils nanofils

Single GaN nanowire (NW) devices fabricated on SiO2 can exhibit  a strong degradation after annealing due to the  occurrence of void formation at the ...

Monolayer Contact Doping of Silicon Surfaces and Nanowires Using Organophosphorus Compounds

Monolayer Contact Doping (MLCD) is a simple method for doping of surfaces and nanostructures1. MLCD results in the formation of highly controlled, ultra shallow and sharp doping profiles at the nanometer scale. In MLCD process the dopant source is a monolayer containing dopant atoms.
In this article a detailed procedure for surface doping of silicon substrate as well as silicon nanowires is demonstrated. Phosphorus dopant source was formed using tetraethyl methylenediphosphonate monolayer on a silicon substrate. This monolayer containing substrate was brought to contact with a pristine intrinsic silicon target substrate and annealed while in contact. Sheet resistance of the target substrate was measured using 4 point probe. Intrinsic silicon nanowires were synthesized by chemical vapor deposition (CVD) process using a vapor-liquid-solid (VLS) mechanism; gold nanoparticles were used as catalyst for nanowire growth. The nanowires were suspended in ethanol by mild sonication. This suspension was used to dropcast the nanowires on silicon substrate with a silicon nitride dielectric top layer. These nanowires were doped with phosphorus in similar manner as used for the intrinsic silicon wafer. Standard photolithography process was used to fabricate metal electrodes for the formation of nanowire based field effect transistor (NW-FET). The electrical properties of a representative nanowire device were measured by a semiconductor device analyzer and a probe station.

A detailed procedure for surface doping of Silicon interfaces is provided. The ultra-shallow surface doping is demonstrated by using phosphorus containing monolayers and rapid annealing process. The method can be used for doping of macroscopic area surfaces as well as nanostructures.

Monocouche Contactez-dopage du silicium Surfaces et nanofils utilisant des composés organophosphorés

Monolayer Contact Doping (MLCD) is a simple method for doping of surfaces and nanostructures1. MLCD results in the formation of highly controlled, ultra ...

Fabrication of Uniform Nanoscale Cavities via Silicon Direct Wafer Bonding

Measurements of the heat capacity and superfluid fraction of confined 4He have been performed near the lambda transition using lithographically patterned and bonded silicon wafers. Unlike confinements in porous materials often used for these types of experiments3, bonded wafers provide predesigned uniform spaces for confinement. The geometry of each cell is well known, which removes a large source of ambiguity in the interpretation of data.
Exceptionally flat, 5 cm diameter, 375 &#181;m thick Si wafers with about 1 &#181;m variation over the entire wafer can be obtained commercially (from Semiconductor Processing Company, for example). Thermal oxide is grown on the wafers to define the confinement dimension in the z-direction. A pattern is then etched in the oxide using lithographic techniques so as to create a desired enclosure upon bonding. A hole is drilled in one of the wafers (the top) to allow for the introduction of the liquid to be measured. The wafers are cleaned2 in RCA solutions and then put in a microclean chamber where they are rinsed with deionized water4. The wafers are bonded at RT and then annealed at ~1,100 &#176;C. This forms a strong and permanent bond. This process can be used to make uniform enclosures for measuring thermal and hydrodynamic properties of confined liquids from the nanometer to the micrometer scale.

A method for permanently bonding two silicon wafers so as to realize a uniform enclosure is described. This includes wafer preparation, cleaning, RT bonding, and annealing processes. The resulting bonded wafers (cells) have uniformity of enclosure ~1%1,2. The resulting geometry allows for measurements of confined liquids and gasses.

Fabrication de cavités uniformes à l’échelle nanométrique via la liaison directe de plaquettes de silicium

Measurements of the heat capacity and superfluid fraction of confined 4He have been performed near the lambda transition using lithographically patterned ...

Construction and Characterization of External Cavity Diode Lasers for Atomic Physics

Since their development in the late 1980s, cheap, reliable external cavity diode lasers (ECDLs) have replaced complex and expensive traditional dye and Titanium Sapphire lasers as the workhorse laser of atomic physics labs1,2. Their versatility and prolific use throughout atomic physics in applications such as absorption spectroscopy and laser cooling1,2 makes it imperative for incoming students to gain a firm practical understanding of these lasers. This publication builds upon the seminal work by Wieman3, updating components, and providing a video tutorial. The setup, frequency locking and performance characterization of an ECDL will be described. Discussion of component selection and proper mounting of both diodes and gratings, the factors affecting mode selection within the cavity, proper alignment for optimal external feedback, optics setup for coarse and fine frequency sensitive measurements, a brief overview of laser locking techniques, and laser linewidth measurements are included.

This is an instructional paper to guide the construction and diagnostics of external cavity diode lasers (ECDLs), including component selection and optical alignment, as well as the basics of frequency reference spectroscopy and laser linewidth measurements for applications in the field of atomic physics.

Construction et caractérisation des lasers externes cavité Diode de physique atomique

Since their development in the late 1980s, cheap, reliable external cavity diode lasers (ECDLs) have replaced complex and expensive traditional dye and ...

Selective Area Modification of Silicon Surface Wettability by Pulsed UV Laser Irradiation in Liquid Environment

The wettability of silicon (Si) is one of the important parameters in the technology of surface functionalization of this material and fabrication of biosensing devices. We report on a protocol of using KrF and ArF lasers irradiating Si (001) samples immersed in a liquid environment with low number of pulses and operating at moderately low pulse fluences to induce Si wettability modification. Wafers immersed for up to 4 hr in a 0.01% H2O2/H2O solution did not show measurable change in their initial contact angle (CA) ~75&#176;. However, the 500-pulse KrF and ArF lasers irradiation of such wafers in a microchamber filled with 0.01% H2O2/H2O solution at 250 and 65 mJ/cm2, respectively, has decreased the CA to near 15&#176;, indicating the formation of a superhydrophilic surface. The formation of OH-terminated Si (001), with no measurable change of the wafer&#8217;s surface morphology, has been confirmed by X-ray photoelectron spectroscopy and atomic force microscopy measurements. The selective area irradiated samples were then immersed in a biotin-conjugated fluorescein-stained nanospheres solution for 2 hr, resulting in a successful immobilization of the nanospheres in the non-irradiated area. This illustrates the potential of&#160;the method for selective area biofunctionalization and fabrication of advanced Si-based biosensing architectures. We also describe a similar protocol of irradiation of wafers immersed in methanol (CH3OH) using ArF laser operating at pulse fluence of 65 mJ/cm2 and in situ formation of a strongly hydrophobic surface of Si (001) with the CA of 103&#176;. The XPS results indicate ArF laser induced formation of Si&#8211;(OCH3)x compounds responsible for the observed hydrophobicity. However, no such compounds were found by XPS on the Si surface irradiated by KrF laser in methanol, demonstrating the inability of the KrF laser to photodissociate methanol and create -OCH3 radicals.

We report on a process of in situ alteration of HF treated Si (001) surface into a hydrophilic or hydrophobic state by irradiating samples in microfluidic chambers filled with&#160;H2O2/H2O solution (0.01%-0.5%) or methanol solutions using pulsed UV laser of a relative low pulse fluence.

Selective Area Modification de la Silicon mouillabilité de surface par irradiation laser pulsé UV en milieu liquide

The wettability of silicon (Si) is one of the important parameters in the technology of surface functionalization of this material and fabrication of ...

Integration of Light Trapping Silver Nanostructures in Hydrogenated Microcrystalline Silicon Solar Cells by Transfer Printing

One of the potential applications of metal nanostructures is light trapping in solar cells, where unique optical properties of nanosized metals, commonly known as plasmonic effects, play an important role. Research in this field has, however, been impeded owing to the difficulty of fabricating devices containing the desired functional metal nanostructures. In order to provide a viable strategy to this issue, we herein show a transfer printing-based approach that allows the quick and low-cost integration of designed metal nanostructures with a variety of device architectures, including solar cells. Nanopillar poly(dimethylsiloxane) (PDMS) stamps were fabricated from a commercially available nanohole plastic film as a master mold. On this nanopatterned PDMS stamps, Ag films were deposited, which were then transfer-printed onto block copolymer (binding layer)-coated hydrogenated microcrystalline Si (&#181;c-Si:H) surface to afford ordered Ag nanodisk structures. It was confirmed that the resulting Ag nanodisk-incorporated &#181;c-Si:H solar cells show higher performances compared to a cell without the transfer-printed Ag nanodisks, thanks to plasmonic light trapping effect derived from the Ag nanodisks. Because of the simplicity and versatility, further device application would also be feasible thorough this approach.

A viable transfer printing-based methodology to introduce plasmonic metal nanostructures in solar cells is described. Using nanopillar poly(dimethylsiloxane) stamps, an Ag-based ordered nanodisk array was integrated with standard hydrogenated microcrystalline Si solar cells, which led to improved device performances due to plasmonic light trapping.

Intégration de la Lumière de piégeage argent Nanostructures dans hydrogénée microcristalline cellules solaires en silicium par impression par transfert

One of the potential applications of metal nanostructures is light trapping in solar cells, where unique optical properties of nanosized metals, commonly ...