The authors would like to thank R&#252;diger Rosenkranz and Sven Niese (Fraunhofer IKTS-MD) for their assistance in sample preparation, and Ude Hangen, Douglas Stauffer, Ryan Major and Oden Warren (Hysitron Inc.) for their technical support on the PI95 TEM holder. The support of the Center for Advancing Electronics Dresden (cfaed) and the Dresden Center for Nanoanalysis (DCN) at Technische Universit&#228;t Dresden is acknowledged as well.

1. Preparing the Sample for the Focused Ion Beam (FIB) Thinning (Figure 1)
<ol>
	<li>Cleave the full wafer into small chips (~ 10 mm by 10 mm) with a diamond scribe.</li>
	<li>Mark the positions of the &#8220;tip-to-tip&#8221; structure on the chips.</li>
	<li>Saw the chip with a dicing machine to obtain bars of 60 &#181;m by 2 mm size. The bar includes the &#8220;tip-to-tip&#8221; structure in the center.</li>
	<li>Glue the target bar on a Cu half ring using the super glue. Next, glue the bar on a Cu sample stage also...

<ol>
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No competing financial interests.

The prerequisite of success in the TDDB experiment is good sample preparation, especially in the FIB milling process in the SEM. Firstly, a thick Pt layer on top of the &#8220;tip-to-tip&#8221; structure has to be deposited. The thickness and the size of the Pt layer can be adjusted by the SEM operator, but have to follow three principles: (1) The thickness and the size are enough to protect the target area from possible ion beam damage during the whole milling process; (2) There is still a relatively thick Pt layer (&#8...

Since Cu interconnects were firstly introduced into the ultra-large-scale integration (ULSI) technology in 1997 1, low-k and ultra-low-k (ULK) dielectrics have been adopted into the back-end-of-line (BEoL) as the insulating materials between on-chip interconnects. The combination of new materials, e.g., Cu for reduced resistance and low-k/ULK dielectrics for lower capacitance, overcomes the effects of increased resistance-capacitance (RC) delay caused by interconnect dimensional shrinkage 2, 3. However, this benefit was encroached by the continuing aggressive scaling of microelectronic devices in recent years. The use of low-k/ULK materials results in various challenges in the manufacturing process and for the product reliability, particularly if the interconnect pitch reaches about 100 nm or less 4-6.
TDDB refers to the physical failure mechanism of a dielectric material as a function of time under an electric field. The TDDB reliability test is usually carried out under accelerated conditions (elevated electrical field and/or elevated temperature).
The TDDB in on-chip interconnect stacks is one of the most critical failure mechanisms for the microelectronic devices, which has already raised intense concerns in the reliability community. It will continue to be in the spotlight of reliability engineers since ULK dielectrics with even weaker electrical and mechanical properties are being integrated into the devices in advanced technology nodes.
Dedicated experiments have been performed to investigate the TDDB failure mechanism 7-9, and a significant amount of effort has been invested to develop models which describe the relationship between electric field and lifetime of the devices 10-13. The existing studies benefit the community of reliability engineers in microelectronics; however, many challenges still exist and many questions still need to be answered in detail. For example, proven models to describe the physical failure mechanism and degradation kinetics in the TDDB process and the respective experimental verification are still lacking. As a particular need, a more appropriate model is needed to substitute the conservative &#8730;E-model 14.
As a very important part of the TDDB investigation, typical failure analysis is facing an unprecedented challenge, i.e., providing comprehensive and hard evidence to explain the physics of failure mechanisms and degradation kinetics. Apparently, inspecting millions of vias and meters of nanoscale Cu lines one by one and ex situ imaging the failure site is not the appropriate choice to hurdle this challenge, because it is very time consuming, and only limited information about the kinetics of the damage mechanism can be provided. Therefore, an urgent task has emerged to develop and to optimize experiments and to get a better procedure to study the TDDB failure mechanisms and degradation kinetics.
In this paper, we will demonstrate an in situ experimental methodology to investigate the TDDB failure mechanism in Cu/ULK interconnect stacks. A TEM with the ability of high quality imaging and chemical analysis is used to study the kinetic process at dedicated test structures. The in situ electrical test is integrated into the TEM experiment to provide an elevated electrical field to the dielectrics. A customized &#8220;tip-to-tip&#8221; structure, consisting of fully encapsulated Cu interconnects and insulated by a ULK material, is designed in the 32 nm CMOS technology node. The experimental procedure described here can also be extended to other structures in active devices.

<table border="0" cellpadding="0" cellspacing="0">
	<tbody>
		<tr>
			<td>Automatic Dicing Saw</td>
			<td>DISCO Kiru-Kezuru-Migaku Technologies</td>
			<td></td>
			<td></td>
		</tr>
		<tr>
			<td>Scanning Electron Microscope</td>
			<td>Zeiss</td>
			<td>Zeiss Nvision 40</td>
			<td></td>
		</tr>
		<tr>
			<td>Picoindentor</td>
			<td>Hysitron</td>
			<td>Hysitron Pi95</td>
			<td></td>
		</tr>
		<tr>
			<td>Keithley SourceMeter</td>
			<td>Keithley</td>
			<td>Keithley 2602/237</td>
			<td></td>
		</tr>
		<tr>
			<td>Transmission Electron Microscope</td>
			<td>FEI</td>
			<td>FEI Tecnai F20</td>
			<td></td>
		</tr>
		<tr>
			<td>Transmission Electron Microscope</td>
			<td>Zeiss</td>
			<td>Zeiss Libra 200</td>
			<td></td>
		</tr>
	</tbody>
</table>

in situ time-dependent dielectric breakdown in the transmission electron microscope: a possibility to understand the failure mechanism in microelectronic devices

The time-dependent dielectric breakdown (TDDB) in on-chip interconnect stacks is one of the most critical failure mechanisms for microelectronic devices. The aggressive scaling of feature sizes, both on devices and interconnects, leads to serious challenges to ensure the required product reliability. Standard reliability tests and post-mortem failure analysis provide only limited information about the physics of failure mechanisms and degradation kinetics. Therefore it is necessary to develop new experimental approaches and procedures to study the TDDB failure mechanisms and degradation kinetics in particular. In this paper, an in situ experimental methodology in the transmission electron microscope (TEM) is demonstrated to investigate the TDDB degradation and failure mechanisms in Cu/ULK interconnect stacks. High quality imaging and chemical analysis are used to study the kinetic process. The in situ electrical test is integrated into the TEM to provide an elevated electrical field to the dielectrics. Electron tomography is utilized to characterize the directed Cu diffusion in the insulating dielectrics. This experimental procedure opens a possibility to study the failure mechanism in interconnect stacks of microelectronic products, and it could also be extended to other structures in active devices.

Figure 4 shows bright field (BF) TEM images from an in situ test. There are partially breached TaN/Ta barriers and pre-existing Cu atoms in the ULK dielectrics before the electrical test (Figure 4A) due to extended storage in ambient. After only 376 sec at 40 V, the dielectric breakdown started and was accompanied with two major migration pathways of copper from the M1 metal, having a positive potential with reference to the ground side 15-16. The diffused Cu particle...

Watch this Scientific Journal Video about In Situ Time-dependent Dielectric Breakdown in the Transmission Electron Microscope: A Possibility to Understand the Failure Mechanism in Microelectronic Devi

In Situ Time-dependent Dielectric Breakdown in the Transmission Electron Microscope: A Possibility to Understand the Failure Mechanism in Microelectronic Devices

The time-dependent dielectric breakdown (TDDB) in on-chip interconnect stacks is one of the most critical failure mechanisms for microelectronic devices. This paper demonstrates the procedure of an in situ TDDB experiment in the transmission electron microscope, which opens a possibility to study the failure mechanism in microelectronic products.

In Situ Time-dependent Dielectric Breakdown in the Transmission Electron Microscope: A Possibility to Understand the Failure Mechanism in Microelectronic Devices

The time-dependent dielectric breakdown (TDDB) in on-chip interconnect stacks is one of the most critical failure mechanisms for microelectronic devices. ...

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8.6K Views.  Fraunhofer Institute for Ceramic Technologies and Systems. The time-dependent dielectric breakdown (TDDB) in on-chip interconnect stacks is one of the most critical failure mechanisms for microelectronic devices. This paper demonstrates the procedure of an in situ TDDB experiment in the transmission electron microscope, which opens a possibility to study the failure mechanism in microelectronic products. 

Video: In Situ Time-dependent Dielectric Breakdown in the Transmission Electron Microscope: A Possibility to Understand the Failure Mechanism in Microelectronic Devices